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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	"Bin Meng" <bin.meng@windriver.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Fabiano Rosas" <farosas@linux.ibm.com>,
	"Lucas Mateus Castro" <lucas.araujo@eldorado.org.br>
Subject: [PULL 05/30] target/ppc: Fix BookE debug interrupt generation
Date: Thu,  5 May 2022 15:49:13 -0300	[thread overview]
Message-ID: <20220505184938.351866-6-danielhb413@gmail.com> (raw)
In-Reply-To: <20220505184938.351866-1-danielhb413@gmail.com>

From: Bin Meng <bin.meng@windriver.com>

Per E500 core reference manual [1], chapter 8.4.4 "Branch Taken Debug
Event" and chapter 8.4.5 "Instruction Complete Debug Event":

  "A branch taken debug event occurs if both MSR[DE] and DBCR0[BRT]
  are set ... Branch taken debug events are not recognized if MSR[DE]
  is cleared when the branch instruction executes."

  "An instruction complete debug event occurs when any instruction
  completes execution so long as MSR[DE] and DBCR0[ICMP] are both
  set ... Instruction complete debug events are not recognized if
  MSR[DE] is cleared at the time of the instruction execution."

Current codes do not check MSR.DE bit before setting HFLAGS_SE and
HFLAGS_BE flag, which would cause the immediate debug interrupt to
be generated, e.g.: when DBCR0.ICMP bit is set by guest software
and MSR.DE is not set.

[1] https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220421011729.1148727-1-bmeng.cn@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 target/ppc/helper_regs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 9a691d6833..77bc57415c 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -63,10 +63,10 @@ static uint32_t hreg_compute_hflags_value(CPUPPCState *env)
 
     if (ppc_flags & POWERPC_FLAG_DE) {
         target_ulong dbcr0 = env->spr[SPR_BOOKE_DBCR0];
-        if (dbcr0 & DBCR0_ICMP) {
+        if ((dbcr0 & DBCR0_ICMP) && msr_de) {
             hflags |= 1 << HFLAGS_SE;
         }
-        if (dbcr0 & DBCR0_BRT) {
+        if ((dbcr0 & DBCR0_BRT) && msr_de) {
             hflags |= 1 << HFLAGS_BE;
         }
     } else {
-- 
2.32.0



  parent reply	other threads:[~2022-05-05 19:29 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05 18:49 [PULL 00/30] ppc queue Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 01/30] target/ppc: initialize 'val' union in kvm_get_one_spr() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 02/30] target/ppc: init 'lpcr' in kvmppc_enable_cap_large_decr() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 03/30] target/ppc: init 'sregs' in kvmppc_put_books_sregs() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 04/30] target/ppc: init 'rmmu_info' in kvm_get_radix_page_info() Daniel Henrique Barboza
2022-05-05 18:49 ` Daniel Henrique Barboza [this message]
2022-05-05 18:49 ` [PULL 06/30] vhost-user: Use correct macro name TARGET_PPC64 Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 07/30] ppc/xive: Always recompute the PIPR when pushing an OS context Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 08/30] ppc/xive: Update the state of the External interrupt signal Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 09/30] target/ppc: Remove fpscr_* macros from cpu.h Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 10/30] target/ppc: Remove unused msr_* macros Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 11/30] target/ppc: Remove msr_pr macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 12/30] target/ppc: Remove msr_le macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 13/30] target/ppc: Remove msr_ds macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 14/30] target/ppc: Remove msr_ile macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 15/30] target/ppc: Remove msr_ee macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 16/30] target/ppc: Remove msr_ce macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 17/30] target/ppc: Remove msr_pow macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 18/30] target/ppc: Remove msr_me macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 19/30] target/ppc: Remove msr_gs macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 20/30] target/ppc: Remove msr_fp macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 21/30] target/ppc: Remove msr_cm macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 22/30] target/ppc: Remove msr_ir macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 23/30] target/ppc: Remove msr_dr macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 24/30] target/ppc: Remove msr_ep macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 25/30] target/ppc: Remove msr_fe0 and msr_fe1 macros Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 26/30] target/ppc: Remove msr_ts macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 27/30] target/ppc: Remove msr_hv macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 28/30] target/ppc: Remove msr_de macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 29/30] target/ppc: Add unused msr bits FIELDs Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 30/30] target/ppc: Change MSR_* to follow POWER ISA numbering convention Daniel Henrique Barboza
2022-05-06  4:17 ` [PULL 00/30] ppc queue Richard Henderson

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