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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	"Frederic Barrat" <fbarrat@linux.ibm.com>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 08/30] ppc/xive: Update the state of the External interrupt signal
Date: Thu,  5 May 2022 15:49:16 -0300	[thread overview]
Message-ID: <20220505184938.351866-9-danielhb413@gmail.com> (raw)
In-Reply-To: <20220505184938.351866-1-danielhb413@gmail.com>

From: Frederic Barrat <fbarrat@linux.ibm.com>

When pulling or pushing an OS context from/to a CPU, we should
re-evaluate the state of the External interrupt signal. Otherwise, we
can end up catching the External interrupt exception in hypervisor
mode, which is unexpected.

The problem is best illustrated with the following scenario:

1. an External interrupt is raised while the guest is on the CPU.

2. before the guest can ack the External interrupt, an hypervisor
interrupt is raised, for example the Hypervisor Decrementer or
Hypervisor Virtualization interrupt. The hypervisor interrupt forces
the guest to exit while the External interrupt is still pending.

3. the hypervisor handles the hypervisor interrupt. At this point, the
External interrupt is still pending. So it's very likely to be
delivered while the hypervisor is running. That's unexpected and can
result in an infinite loop where the hypervisor catches the External
interrupt, looks for an interrupt in its hypervisor queue, doesn't
find any, exits the interrupt handler with the External interrupt
still raised, repeat...

The fix is simply to always lower the External interrupt signal when
pulling an OS context. It means it needs to be raised again when
re-pushing the OS context. Fortunately, it's already the case, as we
now always call xive_tctx_ipb_update(), which will raise the signal if
needed.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220429071620.177142-3-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 hw/intc/xive.c        | 14 ++++++++++++++
 hw/intc/xive2.c       |  2 ++
 include/hw/ppc/xive.h |  1 +
 3 files changed, 17 insertions(+)

diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index c729f6a478..ae221fed73 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -114,6 +114,17 @@ static void xive_tctx_notify(XiveTCTX *tctx, uint8_t ring)
     }
 }
 
+void xive_tctx_reset_os_signal(XiveTCTX *tctx)
+{
+    /*
+     * Lower the External interrupt. Used when pulling an OS
+     * context. It is necessary to avoid catching it in the hypervisor
+     * context. It should be raised again when re-pushing the OS
+     * context.
+     */
+    qemu_irq_lower(xive_tctx_output(tctx, TM_QW1_OS));
+}
+
 static void xive_tctx_set_cppr(XiveTCTX *tctx, uint8_t ring, uint8_t cppr)
 {
     uint8_t *regs = &tctx->regs[ring];
@@ -388,6 +399,8 @@ static uint64_t xive_tm_pull_os_ctx(XivePresenter *xptr, XiveTCTX *tctx,
     /* Invalidate CAM line */
     qw1w2_new = xive_set_field32(TM_QW1W2_VO, qw1w2, 0);
     xive_tctx_set_os_cam(tctx, qw1w2_new);
+
+    xive_tctx_reset_os_signal(tctx);
     return qw1w2;
 }
 
@@ -420,6 +433,7 @@ static void xive_tctx_need_resend(XiveRouter *xrtr, XiveTCTX *tctx,
      * was saved when the context was pulled and that we need to take
      * into account by recalculating the PIPR (which is not
      * saved/restored).
+     * It will also raise the External interrupt signal if needed.
      */
     xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb);
 }
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 400fd70aa8..4d9ff41956 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -269,6 +269,7 @@ uint64_t xive2_tm_pull_os_ctx(XivePresenter *xptr, XiveTCTX *tctx,
         xive2_tctx_save_os_ctx(xrtr, tctx, nvp_blk, nvp_idx);
     }
 
+    xive_tctx_reset_os_signal(tctx);
     return qw1w2;
 }
 
@@ -350,6 +351,7 @@ static void xive2_tctx_need_resend(Xive2Router *xrtr, XiveTCTX *tctx,
      * was saved when the context was pulled and that we need to take
      * into account by recalculating the PIPR (which is not
      * saved/restored).
+     * It will also raise the External interrupt signal if needed.
      */
     xive_tctx_ipb_update(tctx, TM_QW1_OS, ipb);
 }
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 126e4e2c3a..f7eea4ca81 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -527,6 +527,7 @@ Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp);
 void xive_tctx_reset(XiveTCTX *tctx);
 void xive_tctx_destroy(XiveTCTX *tctx);
 void xive_tctx_ipb_update(XiveTCTX *tctx, uint8_t ring, uint8_t ipb);
+void xive_tctx_reset_os_signal(XiveTCTX *tctx);
 
 /*
  * KVM XIVE device helpers
-- 
2.32.0



  parent reply	other threads:[~2022-05-05 19:27 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05 18:49 [PULL 00/30] ppc queue Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 01/30] target/ppc: initialize 'val' union in kvm_get_one_spr() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 02/30] target/ppc: init 'lpcr' in kvmppc_enable_cap_large_decr() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 03/30] target/ppc: init 'sregs' in kvmppc_put_books_sregs() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 04/30] target/ppc: init 'rmmu_info' in kvm_get_radix_page_info() Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 05/30] target/ppc: Fix BookE debug interrupt generation Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 06/30] vhost-user: Use correct macro name TARGET_PPC64 Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 07/30] ppc/xive: Always recompute the PIPR when pushing an OS context Daniel Henrique Barboza
2022-05-05 18:49 ` Daniel Henrique Barboza [this message]
2022-05-05 18:49 ` [PULL 09/30] target/ppc: Remove fpscr_* macros from cpu.h Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 10/30] target/ppc: Remove unused msr_* macros Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 11/30] target/ppc: Remove msr_pr macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 12/30] target/ppc: Remove msr_le macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 13/30] target/ppc: Remove msr_ds macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 14/30] target/ppc: Remove msr_ile macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 15/30] target/ppc: Remove msr_ee macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 16/30] target/ppc: Remove msr_ce macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 17/30] target/ppc: Remove msr_pow macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 18/30] target/ppc: Remove msr_me macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 19/30] target/ppc: Remove msr_gs macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 20/30] target/ppc: Remove msr_fp macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 21/30] target/ppc: Remove msr_cm macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 22/30] target/ppc: Remove msr_ir macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 23/30] target/ppc: Remove msr_dr macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 24/30] target/ppc: Remove msr_ep macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 25/30] target/ppc: Remove msr_fe0 and msr_fe1 macros Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 26/30] target/ppc: Remove msr_ts macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 27/30] target/ppc: Remove msr_hv macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 28/30] target/ppc: Remove msr_de macro Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 29/30] target/ppc: Add unused msr bits FIELDs Daniel Henrique Barboza
2022-05-05 18:49 ` [PULL 30/30] target/ppc: Change MSR_* to follow POWER ISA numbering convention Daniel Henrique Barboza
2022-05-06  4:17 ` [PULL 00/30] ppc queue Richard Henderson

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