All of lore.kernel.org
 help / color / mirror / Atom feed
From: Biju Das <biju.das.jz@bp.renesas.com>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: "Biju Das" <biju.das.jz@bp.renesas.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	linux-renesas-soc@vger.kernel.org,
	"Chris Paterson" <Chris.Paterson2@renesas.com>,
	"Biju Das" <biju.das@bp.renesas.com>,
	"Prabhakar Mahadev Lad" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [RFC 5/8] arm64: dts: renesas: r9a07g044: Add POEG nodes
Date: Tue, 10 May 2022 16:11:09 +0100	[thread overview]
Message-ID: <20220510151112.16249-6-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20220510151112.16249-1-biju.das.jz@bp.renesas.com>

Add POEGG{A,B,C,D} nodes to RZ/G2L SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 28284d537a70..58476519683e 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -360,6 +360,50 @@ gpt7: pwm@10048700 {
 			status = "disabled";
 		};
 
+		poegga: poeg@10048800 {
+			compatible = "renesas,r9a07g044-poeg",
+				     "renesas,rzg2l-poeg";
+			reg = <0 0x10048800 0 0x04>;
+			interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A07G044_POEG_A_CLKP>;
+			power-domains = <&cpg>;
+			resets =  <&cpg R9A07G044_POEG_A_RST>;
+			status = "disabled";
+		};
+
+		poeggb: poeg@10048c00 {
+			compatible = "renesas,r9a07g044-poeg",
+				     "renesas,rzg2l-poeg";
+			reg = <0 0x10048c00 0 0x04>;
+			interrupts = <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A07G044_POEG_B_CLKP>;
+			power-domains = <&cpg>;
+			resets =  <&cpg R9A07G044_POEG_B_RST>;
+			status = "disabled";
+		};
+
+		poeggc: poeg@10049000 {
+			compatible = "renesas,r9a07g044-poeg",
+				     "renesas,rzg2l-poeg";
+			reg = <0 0x10049000 0 0x04>;
+			interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A07G044_POEG_C_CLKP>;
+			power-domains = <&cpg>;
+			resets =  <&cpg R9A07G044_POEG_C_RST>;
+			status = "disabled";
+		};
+
+		poeggd: poeg@10049400 {
+			compatible = "renesas,r9a07g044-poeg",
+				     "renesas,rzg2l-poeg";
+			reg = <0 0x10049400 0 0x04>;
+			interrupts = <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A07G044_POEG_D_CLKP>;
+			power-domains = <&cpg>;
+			resets =  <&cpg R9A07G044_POEG_D_RST>;
+			status = "disabled";
+		};
+
 		ssi0: ssi@10049c00 {
 			compatible = "renesas,r9a07g044-ssi",
 				     "renesas,rz-ssi";
-- 
2.25.1


  parent reply	other threads:[~2022-05-10 15:24 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 15:11 [RFC 0/8] Add RZ/G2L POEG support Biju Das
2022-05-10 15:11 ` [RFC 1/8] dt-bindings: soc: renesas: Add RZ/G2L POEG binding Biju Das
2022-05-17 21:04   ` Rob Herring
2022-05-18  5:58     ` Biju Das
2022-05-18 18:17       ` Rob Herring
2022-05-18 18:34         ` Biju Das
2022-05-19  9:06           ` Geert Uytterhoeven
2022-05-19  9:30             ` Biju Das
2022-05-19 20:04               ` Rob Herring
2022-06-08 16:11                 ` Biju Das
2022-05-10 15:11 ` [RFC 2/8] drivers: soc: renesas: Add POEG driver support Biju Das
2022-05-10 15:11 ` [RFC 3/8] dt-bindings: pwm: rzg2l-gpt: Document renesas,poeg-group property Biju Das
2022-05-10 18:29   ` Rob Herring
2022-05-10 15:11 ` [RFC 4/8] pwm: rzg2l-gpt: Add support for linking with POEG Biju Das
2022-05-19  9:15   ` Geert Uytterhoeven
2022-06-08 17:01     ` Biju Das
2022-05-10 15:11 ` Biju Das [this message]
2022-05-10 15:11 ` [RFC 6/8] arm64: dts: renesas: r9a07g054: Add POEG nodes Biju Das
2022-05-10 15:11 ` [RFC 7/8] arm64: dts: renesas: rzg2l-smarc: Enable POEGG{A,B,C,D} on carrier board Biju Das
2022-05-10 15:11 ` [RFC 8/8] arm64: dts: renesas: rzg2l-smarc: Link GPT4 with POEGGD " Biju Das
2022-05-10 16:00 ` [RFC 0/8] Add RZ/G2L POEG support Uwe Kleine-König
2022-05-10 16:08   ` Biju Das

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220510151112.16249-6-biju.das.jz@bp.renesas.com \
    --to=biju.das.jz@bp.renesas.com \
    --cc=Chris.Paterson2@renesas.com \
    --cc=biju.das@bp.renesas.com \
    --cc=devicetree@vger.kernel.org \
    --cc=geert+renesas@glider.be \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=magnus.damm@gmail.com \
    --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
    --cc=robh+dt@kernel.org \
    --cc=u.kleine-koenig@pengutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.