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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Stuart Summers <stuart.summers@intel.com>,
	Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v3 5/5] drm/i915/guc: XEHPSDV and PVC do not use HuC
Date: Tue, 10 May 2022 23:02:28 -0700	[thread overview]
Message-ID: <20220511060228.1179450-6-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20220511060228.1179450-1-matthew.d.roper@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Disable HuC loading since it is not used on these platforms.

Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index ecf149c5fdb0..55e1eb8f3612 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -45,6 +45,10 @@ static void uc_expand_default_options(struct intel_uc *uc)
 
 	/* Default: enable HuC authentication and GuC submission */
 	i915->params.enable_guc = ENABLE_GUC_LOAD_HUC | ENABLE_GUC_SUBMISSION;
+
+	/* XEHPSDV and PVC do not use HuC */
+	if (IS_XEHPSDV(i915) || IS_PONTEVECCHIO(i915))
+		i915->params.enable_guc &= ~ENABLE_GUC_LOAD_HUC;
 }
 
 /* Reset GuC providing us with fresh state for both GuC and HuC.
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 5/5] drm/i915/guc: XEHPSDV and PVC do not use HuC
Date: Tue, 10 May 2022 23:02:28 -0700	[thread overview]
Message-ID: <20220511060228.1179450-6-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20220511060228.1179450-1-matthew.d.roper@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Disable HuC loading since it is not used on these platforms.

Cc: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index ecf149c5fdb0..55e1eb8f3612 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -45,6 +45,10 @@ static void uc_expand_default_options(struct intel_uc *uc)
 
 	/* Default: enable HuC authentication and GuC submission */
 	i915->params.enable_guc = ENABLE_GUC_LOAD_HUC | ENABLE_GUC_SUBMISSION;
+
+	/* XEHPSDV and PVC do not use HuC */
+	if (IS_XEHPSDV(i915) || IS_PONTEVECCHIO(i915))
+		i915->params.enable_guc &= ~ENABLE_GUC_LOAD_HUC;
 }
 
 /* Reset GuC providing us with fresh state for both GuC and HuC.
-- 
2.35.1


  parent reply	other threads:[~2022-05-11  6:02 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-11  6:02 [PATCH v3 0/5] i915: Introduce Ponte Vecchio Matt Roper
2022-05-11  6:02 ` [Intel-gfx] " Matt Roper
2022-05-11  6:02 ` [PATCH v3 1/5] drm/i915/uncore: Reorganize and document shadow and forcewake tables Matt Roper
2022-05-11  6:02   ` [Intel-gfx] " Matt Roper
2022-05-24 17:25   ` Matt Atwood
2022-05-11  6:02 ` [PATCH v3 2/5] drm/i915/pvc: Add forcewake support Matt Roper
2022-05-11  6:02   ` [Intel-gfx] " Matt Roper
2022-05-24 18:36   ` Matt Atwood
2022-05-11  6:02 ` [PATCH v3 3/5] drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL Matt Roper
2022-05-11  6:02   ` [Intel-gfx] " Matt Roper
2022-05-24 18:37   ` Matt Atwood
2022-05-11  6:02 ` [PATCH v3 4/5] drm/i915/pvc: Add new BCS engines to GuC engine list Matt Roper
2022-05-11  6:02   ` [Intel-gfx] " Matt Roper
2022-05-24 18:38   ` Matt Atwood
2022-05-11  6:02 ` Matt Roper [this message]
2022-05-11  6:02   ` [Intel-gfx] [PATCH v3 5/5] drm/i915/guc: XEHPSDV and PVC do not use HuC Matt Roper
2022-05-24 18:39   ` Matt Atwood
2022-05-11  6:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Introduce Ponte Vecchio (rev4) Patchwork
2022-05-11  6:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-11  6:56 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-05-11 14:33   ` Matt Roper
2022-05-11 15:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-11 19:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-11 20:44   ` Matt Roper
2022-05-11 23:21     ` Vudum, Lakshminarayana
2022-05-11 23:17 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-05-24 19:28   ` Matt Roper

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