From: Heiko Stuebner <heiko@sntech.de> To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org, atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org, hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech, gfavor@ventanamicro.com, andrea.mondelli@huawei.com, behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr, allen.baum@esperantotech.com, jscheid@ventanamicro.com, rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com, philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de> Subject: [PATCH 11/12] riscv: don't use global static vars to store alternative data Date: Wed, 11 May 2022 21:29:20 +0200 [thread overview] Message-ID: <20220511192921.2223629-12-heiko@sntech.de> (raw) In-Reply-To: <20220511192921.2223629-1-heiko@sntech.de> Right now the code uses a global struct to store vendor-ids and another global variable to store the vendor-patch-function. There exist specific cases where we'll need to patch the kernel at an even earlier stage, where trying to write to a static variable might actually result in hangs. Also collecting the vendor-information consists of 3 sbi-ecalls (or csr-reads) which is pretty negligible in the context of booting a kernel. So rework the code to not rely on static variables and instead collect the vendor-information when a round of alternatives is to be applied. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> --- arch/riscv/kernel/alternative.c | 51 ++++++++++++++++----------------- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c index e6c9de9f9ba6..27f722ae452b 100644 --- a/arch/riscv/kernel/alternative.c +++ b/arch/riscv/kernel/alternative.c @@ -16,41 +16,35 @@ #include <asm/sbi.h> #include <asm/csr.h> -static struct cpu_manufacturer_info_t { +struct cpu_manufacturer_info_t { unsigned long vendor_id; unsigned long arch_id; unsigned long imp_id; -} cpu_mfr_info; + void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end, + unsigned long archid, unsigned long impid, + unsigned int stage); +}; -static void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end, - unsigned long archid, unsigned long impid, - unsigned int stage) __initdata_or_module; - -static inline void __init riscv_fill_cpu_mfr_info(void) +static void __init_or_module riscv_fill_cpu_mfr_info(struct cpu_manufacturer_info_t *cpu_mfr_info) { #ifdef CONFIG_RISCV_M_MODE - cpu_mfr_info.vendor_id = csr_read(CSR_MVENDORID); - cpu_mfr_info.arch_id = csr_read(CSR_MARCHID); - cpu_mfr_info.imp_id = csr_read(CSR_MIMPID); + cpu_mfr_info->vendor_id = csr_read(CSR_MVENDORID); + cpu_mfr_info->arch_id = csr_read(CSR_MARCHID); + cpu_mfr_info->imp_id = csr_read(CSR_MIMPID); #else - cpu_mfr_info.vendor_id = sbi_get_mvendorid(); - cpu_mfr_info.arch_id = sbi_get_marchid(); - cpu_mfr_info.imp_id = sbi_get_mimpid(); + cpu_mfr_info->vendor_id = sbi_get_mvendorid(); + cpu_mfr_info->arch_id = sbi_get_marchid(); + cpu_mfr_info->imp_id = sbi_get_mimpid(); #endif -} - -static void __init init_alternative(void) -{ - riscv_fill_cpu_mfr_info(); - switch (cpu_mfr_info.vendor_id) { + switch (cpu_mfr_info->vendor_id) { #ifdef CONFIG_ERRATA_SIFIVE case SIFIVE_VENDOR_ID: - vendor_patch_func = sifive_errata_patch_func; + cpu_mfr_info->vendor_patch_func = sifive_errata_patch_func; break; #endif default: - vendor_patch_func = NULL; + cpu_mfr_info->vendor_patch_func = NULL; } } @@ -63,14 +57,19 @@ static void __init_or_module _apply_alternatives(struct alt_entry *begin, struct alt_entry *end, unsigned int stage) { + struct cpu_manufacturer_info_t cpu_mfr_info; + + riscv_fill_cpu_mfr_info(&cpu_mfr_info); + riscv_cpufeature_patch_func(begin, end, stage); - if (!vendor_patch_func) + if (!cpu_mfr_info.vendor_patch_func) return; - vendor_patch_func(begin, end, - cpu_mfr_info.arch_id, cpu_mfr_info.imp_id, - stage); + cpu_mfr_info.vendor_patch_func(begin, end, + cpu_mfr_info.arch_id, + cpu_mfr_info.imp_id, + stage); } void __init apply_boot_alternatives(void) @@ -78,8 +77,6 @@ void __init apply_boot_alternatives(void) /* If called on non-boot cpu things could go wrong */ WARN_ON(smp_processor_id() != 0); - init_alternative(); - _apply_alternatives((struct alt_entry *)__alt_start, (struct alt_entry *)__alt_end, RISCV_ALTERNATIVES_BOOT); -- 2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de> To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org, atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org, hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech, gfavor@ventanamicro.com, andrea.mondelli@huawei.com, behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr, allen.baum@esperantotech.com, jscheid@ventanamicro.com, rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com, philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de> Subject: [PATCH 11/12] riscv: don't use global static vars to store alternative data Date: Wed, 11 May 2022 21:29:20 +0200 [thread overview] Message-ID: <20220511192921.2223629-12-heiko@sntech.de> (raw) In-Reply-To: <20220511192921.2223629-1-heiko@sntech.de> Right now the code uses a global struct to store vendor-ids and another global variable to store the vendor-patch-function. There exist specific cases where we'll need to patch the kernel at an even earlier stage, where trying to write to a static variable might actually result in hangs. Also collecting the vendor-information consists of 3 sbi-ecalls (or csr-reads) which is pretty negligible in the context of booting a kernel. So rework the code to not rely on static variables and instead collect the vendor-information when a round of alternatives is to be applied. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> --- arch/riscv/kernel/alternative.c | 51 ++++++++++++++++----------------- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c index e6c9de9f9ba6..27f722ae452b 100644 --- a/arch/riscv/kernel/alternative.c +++ b/arch/riscv/kernel/alternative.c @@ -16,41 +16,35 @@ #include <asm/sbi.h> #include <asm/csr.h> -static struct cpu_manufacturer_info_t { +struct cpu_manufacturer_info_t { unsigned long vendor_id; unsigned long arch_id; unsigned long imp_id; -} cpu_mfr_info; + void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end, + unsigned long archid, unsigned long impid, + unsigned int stage); +}; -static void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end, - unsigned long archid, unsigned long impid, - unsigned int stage) __initdata_or_module; - -static inline void __init riscv_fill_cpu_mfr_info(void) +static void __init_or_module riscv_fill_cpu_mfr_info(struct cpu_manufacturer_info_t *cpu_mfr_info) { #ifdef CONFIG_RISCV_M_MODE - cpu_mfr_info.vendor_id = csr_read(CSR_MVENDORID); - cpu_mfr_info.arch_id = csr_read(CSR_MARCHID); - cpu_mfr_info.imp_id = csr_read(CSR_MIMPID); + cpu_mfr_info->vendor_id = csr_read(CSR_MVENDORID); + cpu_mfr_info->arch_id = csr_read(CSR_MARCHID); + cpu_mfr_info->imp_id = csr_read(CSR_MIMPID); #else - cpu_mfr_info.vendor_id = sbi_get_mvendorid(); - cpu_mfr_info.arch_id = sbi_get_marchid(); - cpu_mfr_info.imp_id = sbi_get_mimpid(); + cpu_mfr_info->vendor_id = sbi_get_mvendorid(); + cpu_mfr_info->arch_id = sbi_get_marchid(); + cpu_mfr_info->imp_id = sbi_get_mimpid(); #endif -} - -static void __init init_alternative(void) -{ - riscv_fill_cpu_mfr_info(); - switch (cpu_mfr_info.vendor_id) { + switch (cpu_mfr_info->vendor_id) { #ifdef CONFIG_ERRATA_SIFIVE case SIFIVE_VENDOR_ID: - vendor_patch_func = sifive_errata_patch_func; + cpu_mfr_info->vendor_patch_func = sifive_errata_patch_func; break; #endif default: - vendor_patch_func = NULL; + cpu_mfr_info->vendor_patch_func = NULL; } } @@ -63,14 +57,19 @@ static void __init_or_module _apply_alternatives(struct alt_entry *begin, struct alt_entry *end, unsigned int stage) { + struct cpu_manufacturer_info_t cpu_mfr_info; + + riscv_fill_cpu_mfr_info(&cpu_mfr_info); + riscv_cpufeature_patch_func(begin, end, stage); - if (!vendor_patch_func) + if (!cpu_mfr_info.vendor_patch_func) return; - vendor_patch_func(begin, end, - cpu_mfr_info.arch_id, cpu_mfr_info.imp_id, - stage); + cpu_mfr_info.vendor_patch_func(begin, end, + cpu_mfr_info.arch_id, + cpu_mfr_info.imp_id, + stage); } void __init apply_boot_alternatives(void) @@ -78,8 +77,6 @@ void __init apply_boot_alternatives(void) /* If called on non-boot cpu things could go wrong */ WARN_ON(smp_processor_id() != 0); - init_alternative(); - _apply_alternatives((struct alt_entry *)__alt_start, (struct alt_entry *)__alt_end, RISCV_ALTERNATIVES_BOOT); -- 2.35.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-05-11 19:31 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-11 19:29 [PATCH v10 00/12] riscv: support for Svpbmt and D1 memory types Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-11 19:29 ` [PATCH 01/12] riscv: integrate alternatives better into the main architecture Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:01 ` Christoph Hellwig 2022-05-16 6:01 ` Christoph Hellwig 2022-05-16 6:45 ` Guo Ren 2022-05-16 6:45 ` Guo Ren 2022-05-11 19:29 ` [PATCH 02/12] riscv: allow different stages with alternatives Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:01 ` Christoph Hellwig 2022-05-16 6:01 ` Christoph Hellwig 2022-05-16 6:51 ` Guo Ren 2022-05-16 6:51 ` Guo Ren 2022-05-11 19:29 ` [PATCH 03/12] riscv: implement module alternatives Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:02 ` Christoph Hellwig 2022-05-16 6:02 ` Christoph Hellwig 2022-05-16 6:54 ` Guo Ren 2022-05-16 6:54 ` Guo Ren 2022-05-11 19:29 ` [PATCH 04/12] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:03 ` Christoph Hellwig 2022-05-16 6:03 ` Christoph Hellwig 2022-05-16 6:54 ` Guo Ren 2022-05-16 6:54 ` Guo Ren 2022-05-11 19:29 ` [PATCH 05/12] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:03 ` Christoph Hellwig 2022-05-16 6:03 ` Christoph Hellwig 2022-05-16 6:55 ` Guo Ren 2022-05-16 6:55 ` Guo Ren 2022-05-11 19:29 ` [PATCH 06/12] riscv: prevent compressed instructions in alternatives Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:04 ` Christoph Hellwig 2022-05-16 6:04 ` Christoph Hellwig 2022-05-16 6:55 ` Guo Ren 2022-05-16 6:55 ` Guo Ren 2022-05-11 19:29 ` [PATCH 07/12] riscv: move boot alternatives to after fill_hwcap Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-11 19:29 ` [PATCH 08/12] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:04 ` Christoph Hellwig 2022-05-16 6:04 ` Christoph Hellwig 2022-05-16 6:55 ` Guo Ren 2022-05-16 6:55 ` Guo Ren 2022-05-23 14:03 ` Alexandre Ghiti 2022-05-23 14:03 ` Alexandre Ghiti 2022-05-25 15:22 ` Heiko Stübner 2022-05-25 15:22 ` Heiko Stübner 2022-05-28 8:15 ` Alexandre Ghiti 2022-05-28 8:15 ` Alexandre Ghiti 2022-05-11 19:29 ` [PATCH 09/12] riscv: add RISC-V Svpbmt extension support Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-16 6:10 ` Christoph Hellwig 2022-05-16 6:10 ` Christoph Hellwig 2022-05-16 9:09 ` Philipp Tomsich 2022-05-16 9:09 ` Philipp Tomsich 2022-05-16 10:30 ` Heiko Stübner 2022-05-16 10:30 ` Heiko Stübner 2022-05-11 19:29 ` [PATCH 10/12] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner [this message] 2022-05-11 19:29 ` [PATCH 11/12] riscv: don't use global static vars to store alternative data Heiko Stuebner 2022-05-16 6:15 ` Christoph Hellwig 2022-05-16 6:15 ` Christoph Hellwig 2022-05-11 19:29 ` [PATCH 12/12] riscv: add memory-type errata for T-Head Heiko Stuebner 2022-05-11 19:29 ` Heiko Stuebner 2022-05-13 13:37 ` Guo Ren 2022-05-13 13:37 ` Guo Ren 2022-05-13 3:32 ` [PATCH v10 00/12] riscv: support for Svpbmt and D1 memory types Palmer Dabbelt 2022-05-13 3:32 ` Palmer Dabbelt 2022-05-13 21:41 ` Heiko Stuebner 2022-05-13 21:41 ` Heiko Stuebner
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