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From: Stafford Horne <shorne@gmail.com>
To: QEMU Development <qemu-devel@nongnu.org>
Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>,
	Openrisc <openrisc@lists.librecores.org>,
	Jia Liu <proljc@gmail.com>
Subject: [PULL 3/4] hw/openrisc: use right OMPIC size variable
Date: Sun, 15 May 2022 10:39:47 +0900	[thread overview]
Message-ID: <20220515013948.2993495-4-shorne@gmail.com> (raw)
In-Reply-To: <20220515013948.2993495-1-shorne@gmail.com>

From: "Jason A. Donenfeld" <Jason@zx2c4.com>

This appears to be a copy and paste error. The UART size was used
instead of the much smaller OMPIC size. But actually that smaller OMPIC
size is wrong too and doesn't allow the IPI to work in Linux. So set it
to the old value.

Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
[smh:Updated OR1KSIM_OMPIC size to use OR1KSIM_CPUS_MAX]
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 hw/openrisc/openrisc_sim.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 6873124f74..35adce17ac 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -82,7 +82,7 @@ static const struct MemmapEntry {
     [OR1KSIM_DRAM] =      { 0x00000000,          0 },
     [OR1KSIM_UART] =      { 0x90000000,      0x100 },
     [OR1KSIM_ETHOC] =     { 0x92000000,      0x800 },
-    [OR1KSIM_OMPIC] =     { 0x98000000,         16 },
+    [OR1KSIM_OMPIC] =     { 0x98000000, OR1KSIM_CPUS_MAX * 8 },
 };
 
 static struct openrisc_boot_info {
@@ -418,7 +418,7 @@ static void openrisc_sim_init(MachineState *machine)
 
     if (smp_cpus > 1) {
         openrisc_sim_ompic_init(state, or1ksim_memmap[OR1KSIM_OMPIC].base,
-                                or1ksim_memmap[OR1KSIM_UART].size,
+                                or1ksim_memmap[OR1KSIM_OMPIC].size,
                                 smp_cpus, cpus, OR1KSIM_OMPIC_IRQ);
     }
 
-- 
2.31.1


WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com>
To: QEMU Development <qemu-devel@nongnu.org>
Cc: Openrisc <openrisc@lists.librecores.org>,
	"Jason A. Donenfeld" <Jason@zx2c4.com>,
	Stafford Horne <shorne@gmail.com>, Jia Liu <proljc@gmail.com>
Subject: [PULL 3/4] hw/openrisc: use right OMPIC size variable
Date: Sun, 15 May 2022 10:39:47 +0900	[thread overview]
Message-ID: <20220515013948.2993495-4-shorne@gmail.com> (raw)
In-Reply-To: <20220515013948.2993495-1-shorne@gmail.com>

From: "Jason A. Donenfeld" <Jason@zx2c4.com>

This appears to be a copy and paste error. The UART size was used
instead of the much smaller OMPIC size. But actually that smaller OMPIC
size is wrong too and doesn't allow the IPI to work in Linux. So set it
to the old value.

Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
[smh:Updated OR1KSIM_OMPIC size to use OR1KSIM_CPUS_MAX]
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 hw/openrisc/openrisc_sim.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 6873124f74..35adce17ac 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -82,7 +82,7 @@ static const struct MemmapEntry {
     [OR1KSIM_DRAM] =      { 0x00000000,          0 },
     [OR1KSIM_UART] =      { 0x90000000,      0x100 },
     [OR1KSIM_ETHOC] =     { 0x92000000,      0x800 },
-    [OR1KSIM_OMPIC] =     { 0x98000000,         16 },
+    [OR1KSIM_OMPIC] =     { 0x98000000, OR1KSIM_CPUS_MAX * 8 },
 };
 
 static struct openrisc_boot_info {
@@ -418,7 +418,7 @@ static void openrisc_sim_init(MachineState *machine)
 
     if (smp_cpus > 1) {
         openrisc_sim_ompic_init(state, or1ksim_memmap[OR1KSIM_OMPIC].base,
-                                or1ksim_memmap[OR1KSIM_UART].size,
+                                or1ksim_memmap[OR1KSIM_OMPIC].size,
                                 smp_cpus, cpus, OR1KSIM_OMPIC_IRQ);
     }
 
-- 
2.31.1



  parent reply	other threads:[~2022-05-15  1:40 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-15  1:39 [PULL 0/4] OpenRISC fixes for QEMU 2022-05-15 Stafford Horne
2022-05-15  1:39 ` Stafford Horne
2022-05-15  1:39 ` [PULL 1/4] hw/openrisc: page-align FDT address Stafford Horne
2022-05-15  1:39   ` Stafford Horne
2022-05-15  1:39 ` [PULL 2/4] hw/openrisc: support 4 serial ports in or1ksim Stafford Horne
2022-05-15  1:39   ` Stafford Horne
2022-05-15  1:39 ` Stafford Horne [this message]
2022-05-15  1:39   ` [PULL 3/4] hw/openrisc: use right OMPIC size variable Stafford Horne
2022-05-15  1:39 ` [PULL 4/4] target/openrisc: Do not reset delay slot flag on early tb exit Stafford Horne
2022-05-15  1:39   ` Stafford Horne
2022-05-15 23:12 ` [PULL 0/4] OpenRISC fixes for QEMU 2022-05-15 Richard Henderson
2022-05-15 23:12   ` Richard Henderson
2022-05-15 23:50   ` Stafford Horne
2022-05-15 23:50     ` Stafford Horne

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