From: nick.hawkins@hpe.com To: verdun@hpe.com, nick.hawkins@hpe.com, joel@jms.id.au, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Olof Johansson <olof@lixom.net>, soc@kernel.org, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, devicetree@vger.kernel.org Subject: [PATCH v8 7/8] ARM: dts: Introduce HPE GXP Device tree Date: Mon, 16 May 2022 11:33:45 -0500 [thread overview] Message-ID: <20220516163347.44890-7-nick.hawkins@hpe.com> (raw) In-Reply-To: <20220516163347.44890-1-nick.hawkins@hpe.com> From: Nick Hawkins <nick.hawkins@hpe.com> The HPE SoC is new to linux. A basic device tree layout with minimum required for linux to boot including a timer and watchdog support has been created. The dts file is empty at this point but will be updated in subsequent updates as board specific features are enabled. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- v8: * No change v7: * Changed cache register area length from 0xFFC to 0x1000 * Added space between "," in compatible list for the hpe-bmc-dl360gen10.dts * Added aliases, chosen, and memory to hpe-bmc-dl360gen10.dts * Removed memory from hpe-gxp.dtsi v6: * Added cache-controller to CPU * Removed hpe,gxp-wdt and removed simple-mfd from hpe,gxp-timer * Added space after ',' in compatible lists in the dtsi containing more than one item * Switched clock name iopclk to iop based on feedback from hpe,gxp-timer.yaml * Added clock labels clock-0 and clock-1 * Added dma-ranges to ahb * Changed subject to better match ones in the log * Changed description to fit 75 characters per line v5: * Fixed commit message to show previous changes * Fixed typo ehci -> echi v4: * Removed hpe,gxp-cpu-init as it was no longer necessary * Removed bootargs as requested * Removed empty ahb node * Moved reg after compatible, everywhere * Removed osc and memclk * Removed syscon@c00000f8 as it was not necessary for boot * Fixed Alphabetical issue in dts/Makefile * Added specific board binding for dl360gen10 * Removed empty node * Added Accurate Clock Architecture * Fixed generic-echi and generic-ochi issues * Removed i2cg v3: * Fixed issues with warnings * Used proper patchset format v2: * Reduced size of dtsi to essential components * Followed the proper format for having a dtsi and dts --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 26 +++++ arch/arm/boot/dts/hpe-gxp.dtsi | 127 +++++++++++++++++++++++ 3 files changed, 155 insertions(+) create mode 100644 arch/arm/boot/dts/hpe-bmc-dl360gen10.dts create mode 100644 arch/arm/boot/dts/hpe-gxp.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7c16f8a2b738..293717719c70 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -255,6 +255,8 @@ dtb-$(CONFIG_ARCH_HISI) += \ hi3519-demb.dtb dtb-$(CONFIG_ARCH_HIX5HD2) += \ hisi-x5hd2-dkb.dtb +dtb-$(CONFIG_ARCH_HPE_GXP) += \ + hpe-bmc-dl360gen10.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += \ integratorap.dtb \ integratorap-im-pd1.dtb \ diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts new file mode 100644 index 000000000000..3a7382ce40ef --- /dev/null +++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE DL360Gen10 + */ + +/include/ "hpe-gxp.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "hpe,gxp-dl360gen10", "hpe,gxp"; + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10"; + + aliases { + serial0 = &uartc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; +}; diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi new file mode 100644 index 000000000000..cf735b3c4f35 --- /dev/null +++ b/arch/arm/boot/dts/hpe-gxp.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE GXP + */ + +/dts-v1/; +/ { + model = "Hewlett Packard Enterprise GXP BMC"; + compatible = "hpe,gxp"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a9"; + reg = <0>; + device_type = "cpu"; + next-level-cache = <&L2>; + }; + }; + + clocks { + pll: clock-0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1600000000>; + }; + + iopclk: clock-1 { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + clocks = <&pll>; + }; + }; + + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + dma-ranges; + + L2: cache-controller@b0040000 { + compatible = "arm,pl310-cache"; + reg = <0xb0040000 0x1000>; + cache-unified; + cache-level = <2>; + }; + + ahb@c0000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc0000000 0x30000000>; + dma-ranges; + + vic0: interrupt-controller@eff0000 { + compatible = "arm,pl192-vic"; + reg = <0xeff0000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller@80f00000 { + compatible = "arm,pl192-vic"; + reg = <0x80f00000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uarta: serial@e0 { + compatible = "ns16550a"; + reg = <0xe0 0x8>; + interrupts = <17>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartb: serial@e8 { + compatible = "ns16550a"; + reg = <0xe8 0x8>; + interrupts = <18>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartc: serial@f0 { + compatible = "ns16550a"; + reg = <0xf0 0x8>; + interrupts = <19>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + usb0: usb@efe0000 { + compatible = "hpe,gxp-ehci", "generic-ehci"; + reg = <0xefe0000 0x100>; + interrupts = <7>; + interrupt-parent = <&vic0>; + }; + + st: timer@80 { + compatible = "hpe,gxp-timer"; + reg = <0x80 0x16>; + interrupts = <0>; + interrupt-parent = <&vic0>; + clocks = <&iopclk>; + clock-names = "iop"; + }; + + usb1: usb@efe0100 { + compatible = "hpe,gxp-ohci", "generic-ohci"; + reg = <0xefe0100 0x110>; + interrupts = <6>; + interrupt-parent = <&vic0>; + }; + }; + }; +}; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: nick.hawkins@hpe.com To: verdun@hpe.com, nick.hawkins@hpe.com, joel@jms.id.au, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Olof Johansson <olof@lixom.net>, soc@kernel.org, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, devicetree@vger.kernel.org Subject: [PATCH v8 7/8] ARM: dts: Introduce HPE GXP Device tree Date: Mon, 16 May 2022 11:33:45 -0500 [thread overview] Message-ID: <20220516163347.44890-7-nick.hawkins@hpe.com> (raw) In-Reply-To: <20220516163347.44890-1-nick.hawkins@hpe.com> From: Nick Hawkins <nick.hawkins@hpe.com> The HPE SoC is new to linux. A basic device tree layout with minimum required for linux to boot including a timer and watchdog support has been created. The dts file is empty at this point but will be updated in subsequent updates as board specific features are enabled. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- v8: * No change v7: * Changed cache register area length from 0xFFC to 0x1000 * Added space between "," in compatible list for the hpe-bmc-dl360gen10.dts * Added aliases, chosen, and memory to hpe-bmc-dl360gen10.dts * Removed memory from hpe-gxp.dtsi v6: * Added cache-controller to CPU * Removed hpe,gxp-wdt and removed simple-mfd from hpe,gxp-timer * Added space after ',' in compatible lists in the dtsi containing more than one item * Switched clock name iopclk to iop based on feedback from hpe,gxp-timer.yaml * Added clock labels clock-0 and clock-1 * Added dma-ranges to ahb * Changed subject to better match ones in the log * Changed description to fit 75 characters per line v5: * Fixed commit message to show previous changes * Fixed typo ehci -> echi v4: * Removed hpe,gxp-cpu-init as it was no longer necessary * Removed bootargs as requested * Removed empty ahb node * Moved reg after compatible, everywhere * Removed osc and memclk * Removed syscon@c00000f8 as it was not necessary for boot * Fixed Alphabetical issue in dts/Makefile * Added specific board binding for dl360gen10 * Removed empty node * Added Accurate Clock Architecture * Fixed generic-echi and generic-ochi issues * Removed i2cg v3: * Fixed issues with warnings * Used proper patchset format v2: * Reduced size of dtsi to essential components * Followed the proper format for having a dtsi and dts --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 26 +++++ arch/arm/boot/dts/hpe-gxp.dtsi | 127 +++++++++++++++++++++++ 3 files changed, 155 insertions(+) create mode 100644 arch/arm/boot/dts/hpe-bmc-dl360gen10.dts create mode 100644 arch/arm/boot/dts/hpe-gxp.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7c16f8a2b738..293717719c70 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -255,6 +255,8 @@ dtb-$(CONFIG_ARCH_HISI) += \ hi3519-demb.dtb dtb-$(CONFIG_ARCH_HIX5HD2) += \ hisi-x5hd2-dkb.dtb +dtb-$(CONFIG_ARCH_HPE_GXP) += \ + hpe-bmc-dl360gen10.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += \ integratorap.dtb \ integratorap-im-pd1.dtb \ diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts new file mode 100644 index 000000000000..3a7382ce40ef --- /dev/null +++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE DL360Gen10 + */ + +/include/ "hpe-gxp.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "hpe,gxp-dl360gen10", "hpe,gxp"; + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10"; + + aliases { + serial0 = &uartc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; +}; diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi new file mode 100644 index 000000000000..cf735b3c4f35 --- /dev/null +++ b/arch/arm/boot/dts/hpe-gxp.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE GXP + */ + +/dts-v1/; +/ { + model = "Hewlett Packard Enterprise GXP BMC"; + compatible = "hpe,gxp"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a9"; + reg = <0>; + device_type = "cpu"; + next-level-cache = <&L2>; + }; + }; + + clocks { + pll: clock-0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1600000000>; + }; + + iopclk: clock-1 { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + clocks = <&pll>; + }; + }; + + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + dma-ranges; + + L2: cache-controller@b0040000 { + compatible = "arm,pl310-cache"; + reg = <0xb0040000 0x1000>; + cache-unified; + cache-level = <2>; + }; + + ahb@c0000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc0000000 0x30000000>; + dma-ranges; + + vic0: interrupt-controller@eff0000 { + compatible = "arm,pl192-vic"; + reg = <0xeff0000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller@80f00000 { + compatible = "arm,pl192-vic"; + reg = <0x80f00000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uarta: serial@e0 { + compatible = "ns16550a"; + reg = <0xe0 0x8>; + interrupts = <17>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartb: serial@e8 { + compatible = "ns16550a"; + reg = <0xe8 0x8>; + interrupts = <18>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartc: serial@f0 { + compatible = "ns16550a"; + reg = <0xf0 0x8>; + interrupts = <19>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + usb0: usb@efe0000 { + compatible = "hpe,gxp-ehci", "generic-ehci"; + reg = <0xefe0000 0x100>; + interrupts = <7>; + interrupt-parent = <&vic0>; + }; + + st: timer@80 { + compatible = "hpe,gxp-timer"; + reg = <0x80 0x16>; + interrupts = <0>; + interrupt-parent = <&vic0>; + clocks = <&iopclk>; + clock-names = "iop"; + }; + + usb1: usb@efe0100 { + compatible = "hpe,gxp-ohci", "generic-ohci"; + reg = <0xefe0100 0x110>; + interrupts = <6>; + interrupt-parent = <&vic0>; + }; + }; + }; +}; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-16 16:33 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-16 16:33 [PATCH v8 1/8] ARM: hpe: Introduce the HPE GXP architecture nick.hawkins 2022-05-16 16:33 ` nick.hawkins 2022-05-16 16:33 ` [PATCH v8 2/8] ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH nick.hawkins 2022-05-16 16:33 ` nick.hawkins 2022-05-16 16:33 ` [PATCH v8 3/8] watchdog: hpe-wdt: Introduce HPE GXP Watchdog nick.hawkins 2022-05-16 16:33 ` nick.hawkins 2022-05-16 21:28 ` Guenter Roeck 2022-05-16 21:28 ` Guenter Roeck 2022-05-16 16:33 ` [PATCH v8 4/8] clocksource/drivers/timer-gxp: Add HPE GXP Timer nick.hawkins 2022-05-16 16:33 ` nick.hawkins 2022-05-16 16:33 ` [PATCH v8 5/8] dt-bindings: timer: hpe,gxp-timer: Add HPE GXP Timer and Watchdog nick.hawkins 2022-05-16 16:33 ` [PATCH v8 5/8] dt-bindings: timer: hpe, gxp-timer: " nick.hawkins 2022-05-16 16:33 ` [PATCH v8 6/8] dt-bindings: arm: hpe: add GXP Support nick.hawkins 2022-05-16 16:33 ` nick.hawkins 2022-05-16 16:33 ` nick.hawkins [this message] 2022-05-16 16:33 ` [PATCH v8 7/8] ARM: dts: Introduce HPE GXP Device tree nick.hawkins 2022-05-16 16:33 ` [PATCH v8 8/8] MAINTAINERS: Introduce HPE GXP Architecture nick.hawkins 2022-05-16 16:33 ` nick.hawkins
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