From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com
Subject: [Intel-gfx] [PATCH 5/7] drm/i915/pcode: DGFX PCODE MBOX headers
Date: Wed, 18 May 2022 18:37:14 +0530 [thread overview]
Message-ID: <20220518130716.10936-6-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20220518130716.10936-1-anshuman.gupta@intel.com>
DGFX uses similar PCODE MBOX interface as IGFX but
uses distinct COMMAND and PARAM set of bit fields.
Adding those headers Accordingly.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 321a08281a3f..ec2609fa233b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6735,6 +6735,9 @@
#define GEN6_PCODE_MAILBOX _MMIO(0x138124)
#define GEN6_PCODE_READY (1 << 31)
+#define GEN6_PCODE_MB_PARAM2 REG_GENMASK(23, 16)
+#define GEN6_PCODE_MB_PARAM1 REG_GENMASK(15, 8)
+#define GEN6_PCODE_MB_COMMAND REG_GENMASK(7, 0)
#define GEN6_PCODE_ERROR_MASK 0xFF
#define GEN6_PCODE_SUCCESS 0x0
#define GEN6_PCODE_ILLEGAL_CMD 0x1
--
2.26.2
next prev parent reply other threads:[~2022-05-18 13:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-18 13:07 [Intel-gfx] [PATCH 0/7] DG2 VRAM_SR Support Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 1/7] drm/i915/dgfx: OpRegion VRAM Self Refresh Support Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 2/7] drm/i915/dg1: OpRegion PCON DG1 MBD config support Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 3/7] drm/i915/dg2: DG2 MBD config Anshuman Gupta
2022-05-19 9:26 ` Jani Nikula
2022-05-30 4:44 ` Gupta, Anshuman
2022-05-31 15:39 ` Matt Roper
2022-05-18 13:07 ` [Intel-gfx] [PATCH 4/7] drm/i915/dgfx: Add has_lmem_sr Anshuman Gupta
2022-05-18 13:07 ` Anshuman Gupta [this message]
2022-05-18 13:07 ` [Intel-gfx] [PATCH 6/7] drm/i915/dgfx: Setup VRAM SR with D3COLD Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 7/7] drm/i915/rpm: Enable D3Cold VRAM SR Support Anshuman Gupta
2022-05-18 14:15 ` Ville Syrjälä
2022-05-18 15:19 ` Gupta, Anshuman
2022-05-18 18:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DG2 VRAM_SR Support (rev2) Patchwork
2022-05-18 18:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-18 18:50 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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