From: Yassine Oudjana <yassine.oudjana@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Tinghan Shen <tinghan.shen@mediatek.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>,
Weiyi Lu <weiyi.lu@mediatek.com>, Ikjoon Jang <ikjn@chromium.org>,
Miles Chen <miles.chen@mediatek.com>,
Sam Shih <sam.shih@mediatek.com>,
Chen-Yu Tsai <wenst@chromium.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Yassine Oudjana <yassine.oudjana@gmail.com>,
devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht,
Rob Herring <robh@kernel.org>
Subject: [PATCH v2 3/4] dt-bindings: arm: mediatek: Add MT6735 clock controller compatibles
Date: Thu, 19 May 2022 18:22:10 +0400 [thread overview]
Message-ID: <20220519142211.458336-4-y.oudjana@protonmail.com> (raw)
In-Reply-To: <20220519142211.458336-1-y.oudjana@protonmail.com>
From: Yassine Oudjana <y.oudjana@protonmail.com>
Add compatible strings for MT6735 apmixedsys, topckgen, infracfg
and pericfg.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/arm/mediatek/mediatek,infracfg.yaml | 8 +++++---
.../bindings/arm/mediatek/mediatek,pericfg.yaml | 1 +
.../devicetree/bindings/clock/mediatek,apmixedsys.yaml | 4 +++-
.../devicetree/bindings/clock/mediatek,topckgen.yaml | 4 +++-
4 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
index 8681b785ed6d..aa1bb13e0d67 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
@@ -11,9 +11,10 @@ maintainers:
description:
The Mediatek infracfg controller provides various clocks and reset outputs
- to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>,
- and reset values in <dt-bindings/reset/mt*-reset.h> and
- <dt-bindings/reset/mt*-resets.h>.
+ to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>
+ and <dt-bindings/clock/mediatek,mt6735-infracfg.h>, and reset values in
+ <dt-bindings/reset/mt*-reset.h>, <dt-bindings/reset/mt*-resets.h> and
+ <dt-bindings/reset/mediatek,mt6735-infracfg.h>.
properties:
compatible:
@@ -22,6 +23,7 @@ properties:
- enum:
- mediatek,mt2701-infracfg
- mediatek,mt2712-infracfg
+ - mediatek,mt6735-infracfg
- mediatek,mt6765-infracfg
- mediatek,mt6779-infracfg_ao
- mediatek,mt6797-infracfg
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
index 611f666f359d..94e5e003e60e 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
@@ -20,6 +20,7 @@ properties:
- enum:
- mediatek,mt2701-pericfg
- mediatek,mt2712-pericfg
+ - mediatek,mt6735-pericfg
- mediatek,mt6765-pericfg
- mediatek,mt7622-pericfg
- mediatek,mt7629-pericfg
diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
index 770546195fb5..3a186621e7a9 100644
--- a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
@@ -12,7 +12,8 @@ maintainers:
description:
The Mediatek apmixedsys controller provides PLLs to the system.
- The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
+ The clock values can be found in <dt-bindings/clock/mt*-clk.h>
+ and <dt-bindings/clock/mediatek,mt6735-apmixedsys.h>.
properties:
compatible:
@@ -32,6 +33,7 @@ properties:
- enum:
- mediatek,mt2701-apmixedsys
- mediatek,mt2712-apmixedsys
+ - mediatek,mt6735-apmixedsys
- mediatek,mt6765-apmixedsys
- mediatek,mt6779-apmixedsys
- mediatek,mt7629-apmixedsys
diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
index 5b8b37a2e594..920bf0828d58 100644
--- a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
@@ -12,7 +12,8 @@ maintainers:
description:
The Mediatek topckgen controller provides various clocks to the system.
- The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
+ The clock values can be found in <dt-bindings/clock/mt*-clk.h> and
+ <dt-bindings/clock/mediatek,mt6735-topckgen.h>.
properties:
compatible:
@@ -31,6 +32,7 @@ properties:
- enum:
- mediatek,mt2701-topckgen
- mediatek,mt2712-topckgen
+ - mediatek,mt6735-topckgen
- mediatek,mt6765-topckgen
- mediatek,mt6779-topckgen
- mediatek,mt7629-topckgen
--
2.36.1
WARNING: multiple messages have this Message-ID (diff)
From: Yassine Oudjana <yassine.oudjana@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Tinghan Shen <tinghan.shen@mediatek.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>,
Weiyi Lu <weiyi.lu@mediatek.com>, Ikjoon Jang <ikjn@chromium.org>,
Miles Chen <miles.chen@mediatek.com>,
Sam Shih <sam.shih@mediatek.com>,
Chen-Yu Tsai <wenst@chromium.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Yassine Oudjana <yassine.oudjana@gmail.com>,
devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht,
Rob Herring <robh@kernel.org>
Subject: [PATCH v2 3/4] dt-bindings: arm: mediatek: Add MT6735 clock controller compatibles
Date: Thu, 19 May 2022 18:22:10 +0400 [thread overview]
Message-ID: <20220519142211.458336-4-y.oudjana@protonmail.com> (raw)
In-Reply-To: <20220519142211.458336-1-y.oudjana@protonmail.com>
From: Yassine Oudjana <y.oudjana@protonmail.com>
Add compatible strings for MT6735 apmixedsys, topckgen, infracfg
and pericfg.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/arm/mediatek/mediatek,infracfg.yaml | 8 +++++---
.../bindings/arm/mediatek/mediatek,pericfg.yaml | 1 +
.../devicetree/bindings/clock/mediatek,apmixedsys.yaml | 4 +++-
.../devicetree/bindings/clock/mediatek,topckgen.yaml | 4 +++-
4 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
index 8681b785ed6d..aa1bb13e0d67 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
@@ -11,9 +11,10 @@ maintainers:
description:
The Mediatek infracfg controller provides various clocks and reset outputs
- to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>,
- and reset values in <dt-bindings/reset/mt*-reset.h> and
- <dt-bindings/reset/mt*-resets.h>.
+ to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>
+ and <dt-bindings/clock/mediatek,mt6735-infracfg.h>, and reset values in
+ <dt-bindings/reset/mt*-reset.h>, <dt-bindings/reset/mt*-resets.h> and
+ <dt-bindings/reset/mediatek,mt6735-infracfg.h>.
properties:
compatible:
@@ -22,6 +23,7 @@ properties:
- enum:
- mediatek,mt2701-infracfg
- mediatek,mt2712-infracfg
+ - mediatek,mt6735-infracfg
- mediatek,mt6765-infracfg
- mediatek,mt6779-infracfg_ao
- mediatek,mt6797-infracfg
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
index 611f666f359d..94e5e003e60e 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
@@ -20,6 +20,7 @@ properties:
- enum:
- mediatek,mt2701-pericfg
- mediatek,mt2712-pericfg
+ - mediatek,mt6735-pericfg
- mediatek,mt6765-pericfg
- mediatek,mt7622-pericfg
- mediatek,mt7629-pericfg
diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
index 770546195fb5..3a186621e7a9 100644
--- a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
@@ -12,7 +12,8 @@ maintainers:
description:
The Mediatek apmixedsys controller provides PLLs to the system.
- The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
+ The clock values can be found in <dt-bindings/clock/mt*-clk.h>
+ and <dt-bindings/clock/mediatek,mt6735-apmixedsys.h>.
properties:
compatible:
@@ -32,6 +33,7 @@ properties:
- enum:
- mediatek,mt2701-apmixedsys
- mediatek,mt2712-apmixedsys
+ - mediatek,mt6735-apmixedsys
- mediatek,mt6765-apmixedsys
- mediatek,mt6779-apmixedsys
- mediatek,mt7629-apmixedsys
diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
index 5b8b37a2e594..920bf0828d58 100644
--- a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
@@ -12,7 +12,8 @@ maintainers:
description:
The Mediatek topckgen controller provides various clocks to the system.
- The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
+ The clock values can be found in <dt-bindings/clock/mt*-clk.h> and
+ <dt-bindings/clock/mediatek,mt6735-topckgen.h>.
properties:
compatible:
@@ -31,6 +32,7 @@ properties:
- enum:
- mediatek,mt2701-topckgen
- mediatek,mt2712-topckgen
+ - mediatek,mt6735-topckgen
- mediatek,mt6765-topckgen
- mediatek,mt6779-topckgen
- mediatek,mt7629-topckgen
--
2.36.1
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Yassine Oudjana <yassine.oudjana@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Tinghan Shen <tinghan.shen@mediatek.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>,
Weiyi Lu <weiyi.lu@mediatek.com>, Ikjoon Jang <ikjn@chromium.org>,
Miles Chen <miles.chen@mediatek.com>,
Sam Shih <sam.shih@mediatek.com>,
Chen-Yu Tsai <wenst@chromium.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Yassine Oudjana <yassine.oudjana@gmail.com>,
devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht,
Rob Herring <robh@kernel.org>
Subject: [PATCH v2 3/4] dt-bindings: arm: mediatek: Add MT6735 clock controller compatibles
Date: Thu, 19 May 2022 18:22:10 +0400 [thread overview]
Message-ID: <20220519142211.458336-4-y.oudjana@protonmail.com> (raw)
In-Reply-To: <20220519142211.458336-1-y.oudjana@protonmail.com>
From: Yassine Oudjana <y.oudjana@protonmail.com>
Add compatible strings for MT6735 apmixedsys, topckgen, infracfg
and pericfg.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/arm/mediatek/mediatek,infracfg.yaml | 8 +++++---
.../bindings/arm/mediatek/mediatek,pericfg.yaml | 1 +
.../devicetree/bindings/clock/mediatek,apmixedsys.yaml | 4 +++-
.../devicetree/bindings/clock/mediatek,topckgen.yaml | 4 +++-
4 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
index 8681b785ed6d..aa1bb13e0d67 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml
@@ -11,9 +11,10 @@ maintainers:
description:
The Mediatek infracfg controller provides various clocks and reset outputs
- to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>,
- and reset values in <dt-bindings/reset/mt*-reset.h> and
- <dt-bindings/reset/mt*-resets.h>.
+ to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>
+ and <dt-bindings/clock/mediatek,mt6735-infracfg.h>, and reset values in
+ <dt-bindings/reset/mt*-reset.h>, <dt-bindings/reset/mt*-resets.h> and
+ <dt-bindings/reset/mediatek,mt6735-infracfg.h>.
properties:
compatible:
@@ -22,6 +23,7 @@ properties:
- enum:
- mediatek,mt2701-infracfg
- mediatek,mt2712-infracfg
+ - mediatek,mt6735-infracfg
- mediatek,mt6765-infracfg
- mediatek,mt6779-infracfg_ao
- mediatek,mt6797-infracfg
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
index 611f666f359d..94e5e003e60e 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml
@@ -20,6 +20,7 @@ properties:
- enum:
- mediatek,mt2701-pericfg
- mediatek,mt2712-pericfg
+ - mediatek,mt6735-pericfg
- mediatek,mt6765-pericfg
- mediatek,mt7622-pericfg
- mediatek,mt7629-pericfg
diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
index 770546195fb5..3a186621e7a9 100644
--- a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
@@ -12,7 +12,8 @@ maintainers:
description:
The Mediatek apmixedsys controller provides PLLs to the system.
- The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
+ The clock values can be found in <dt-bindings/clock/mt*-clk.h>
+ and <dt-bindings/clock/mediatek,mt6735-apmixedsys.h>.
properties:
compatible:
@@ -32,6 +33,7 @@ properties:
- enum:
- mediatek,mt2701-apmixedsys
- mediatek,mt2712-apmixedsys
+ - mediatek,mt6735-apmixedsys
- mediatek,mt6765-apmixedsys
- mediatek,mt6779-apmixedsys
- mediatek,mt7629-apmixedsys
diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
index 5b8b37a2e594..920bf0828d58 100644
--- a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
@@ -12,7 +12,8 @@ maintainers:
description:
The Mediatek topckgen controller provides various clocks to the system.
- The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
+ The clock values can be found in <dt-bindings/clock/mt*-clk.h> and
+ <dt-bindings/clock/mediatek,mt6735-topckgen.h>.
properties:
compatible:
@@ -31,6 +32,7 @@ properties:
- enum:
- mediatek,mt2701-topckgen
- mediatek,mt2712-topckgen
+ - mediatek,mt6735-topckgen
- mediatek,mt6765-topckgen
- mediatek,mt6779-topckgen
- mediatek,mt7629-topckgen
--
2.36.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-19 14:24 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-19 14:22 [PATCH v2 0/4] Mediatek MT6735 main clock and reset drivers Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` [PATCH v2 1/4] dt-bindings: clock: Add Mediatek MT6735 clock bindings Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` [PATCH v2 2/4] dt-bindings: reset: Add MT6735 reset bindings Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-20 8:55 ` AngeloGioacchino Del Regno
2022-05-20 8:55 ` AngeloGioacchino Del Regno
2022-05-20 8:55 ` AngeloGioacchino Del Regno
2022-05-20 9:13 ` Yassine Oudjana
2022-05-20 9:13 ` Yassine Oudjana
2022-05-20 9:13 ` Yassine Oudjana
2022-05-23 12:15 ` AngeloGioacchino Del Regno
2022-05-23 12:15 ` AngeloGioacchino Del Regno
2022-05-23 12:15 ` AngeloGioacchino Del Regno
2022-05-19 14:22 ` Yassine Oudjana [this message]
2022-05-19 14:22 ` [PATCH v2 3/4] dt-bindings: arm: mediatek: Add MT6735 clock controller compatibles Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` [PATCH v2 4/4] clk: mediatek: Add drivers for MediaTek MT6735 main clock drivers Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-19 14:22 ` Yassine Oudjana
2022-05-20 8:35 ` Miles Chen
2022-05-20 8:35 ` Miles Chen
2022-05-20 8:35 ` Miles Chen
2022-05-20 9:18 ` Yassine Oudjana
2022-05-20 9:18 ` Yassine Oudjana
2022-05-20 9:18 ` Yassine Oudjana
2022-05-20 9:35 ` Miles Chen
2022-05-20 9:35 ` Miles Chen
2022-05-20 9:35 ` Miles Chen
2022-05-20 10:26 ` AngeloGioacchino Del Regno
2022-05-20 10:26 ` AngeloGioacchino Del Regno
2022-05-20 10:26 ` AngeloGioacchino Del Regno
2022-05-20 11:08 ` Yassine Oudjana
2022-05-20 11:08 ` Yassine Oudjana
2022-05-20 11:08 ` Yassine Oudjana
2022-05-22 17:02 ` Miles Chen
2022-05-22 17:02 ` Miles Chen
2022-05-22 17:02 ` Miles Chen
2022-08-13 10:44 ` Yassine Oudjana
2022-08-13 10:44 ` Yassine Oudjana
2022-08-29 9:31 ` AngeloGioacchino Del Regno
2022-08-29 9:31 ` AngeloGioacchino Del Regno
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