All of lore.kernel.org
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Subject: [PULL 15/17] i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls
Date: Wed, 25 May 2022 21:28:50 +0200	[thread overview]
Message-ID: <20220525192852.301633-16-pbonzini@redhat.com> (raw)
In-Reply-To: <20220525192852.301633-1-pbonzini@redhat.com>

From: Vitaly Kuznetsov <vkuznets@redhat.com>

KVM kind of supported "extended GVA ranges" (up to 4095 additional GFNs
per hypercall) since the implementation of Hyper-V PV TLB flush feature
(Linux-4.18) as regardless of the request, full TLB flush was always
performed. "Extended GVA ranges for TLB flush hypercalls" feature bit
wasn't exposed then. Now, as KVM gains support for fine-grained TLB
flush handling, exposing this feature starts making sense.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220525115949.1294004-5-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 docs/hyperv.txt                | 7 +++++++
 target/i386/cpu.h              | 1 +
 target/i386/kvm/hyperv-proto.h | 1 +
 target/i386/cpu.c              | 2 ++
 target/i386/kvm/kvm.c          | 8 ++++++++
 5 files changed, 19 insertions(+)

diff --git a/docs/hyperv.txt b/docs/hyperv.txt
index af1b10c0b3..4b132b1c94 100644
--- a/docs/hyperv.txt
+++ b/docs/hyperv.txt
@@ -255,6 +255,13 @@ Hyper-V specification allows to pass parameters for certain hypercalls using XMM
 registers ("XMM Fast Hypercall Input"). When the feature is in use, it allows
 for faster hypercalls processing as KVM can avoid reading guest's memory.
 
+3.24. hv-tlbflush-ext
+=====================
+Allow for extended GVA ranges to be passed to Hyper-V TLB flush hypercalls
+(HvFlushVirtualAddressList/HvFlushVirtualAddressListEx).
+
+Requires: hv-tlbflush
+
 4. Supplementary features
 =========================
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 37e9553584..5ff48257e5 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1108,6 +1108,7 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
 #define HYPERV_FEAT_SYNDBG              16
 #define HYPERV_FEAT_MSR_BITMAP          17
 #define HYPERV_FEAT_XMM_INPUT           18
+#define HYPERV_FEAT_TLBFLUSH_EXT        19
 
 #ifndef HYPERV_SPINLOCK_NEVER_NOTIFY
 #define HYPERV_SPINLOCK_NEVER_NOTIFY             0xFFFFFFFF
diff --git a/target/i386/kvm/hyperv-proto.h b/target/i386/kvm/hyperv-proto.h
index f5f16474fa..c7854ed6d3 100644
--- a/target/i386/kvm/hyperv-proto.h
+++ b/target/i386/kvm/hyperv-proto.h
@@ -59,6 +59,7 @@
 #define HV_FREQUENCY_MSRS_AVAILABLE             (1u << 8)
 #define HV_GUEST_CRASH_MSR_AVAILABLE            (1u << 10)
 #define HV_FEATURE_DEBUG_MSRS_AVAILABLE         (1u << 11)
+#define HV_EXT_GVA_RANGES_FLUSH_AVAILABLE       (1u << 14)
 #define HV_STIMER_DIRECT_MODE_AVAILABLE         (1u << 19)
 
 /*
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 63cec0ea68..3429a4e455 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6972,6 +6972,8 @@ static Property x86_cpu_properties[] = {
                       HYPERV_FEAT_MSR_BITMAP, 0),
     DEFINE_PROP_BIT64("hv-xmm-input", X86CPU, hyperv_features,
                       HYPERV_FEAT_XMM_INPUT, 0),
+    DEFINE_PROP_BIT64("hv-tlbflush-ext", X86CPU, hyperv_features,
+                      HYPERV_FEAT_TLBFLUSH_EXT, 0),
     DEFINE_PROP_ON_OFF_AUTO("hv-no-nonarch-coresharing", X86CPU,
                             hyperv_no_nonarch_cs, ON_OFF_AUTO_OFF),
     DEFINE_PROP_BIT64("hv-syndbg", X86CPU, hyperv_features,
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 7e6f934eda..a11c8e88f6 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -987,6 +987,14 @@ static struct {
              .bits = HV_HYPERCALL_XMM_INPUT_AVAILABLE}
         }
     },
+    [HYPERV_FEAT_TLBFLUSH_EXT] = {
+        .desc = "Extended gva ranges for TLB flush hypercalls (hv-tlbflush-ext)",
+        .flags = {
+            {.func = HV_CPUID_FEATURES, .reg = R_EDX,
+             .bits = HV_EXT_GVA_RANGES_FLUSH_AVAILABLE}
+        },
+        .dependencies = BIT(HYPERV_FEAT_TLBFLUSH)
+    },
 };
 
 static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max,
-- 
2.36.1




  parent reply	other threads:[~2022-05-25 19:37 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-25 19:28 [PULL 00/17] Misc patches for 2022-05-25 Paolo Bonzini
2022-05-25 19:28 ` [PULL 01/17] target/i386: Remove LBREn bit check when access Arch LBR MSRs Paolo Bonzini
2022-05-25 19:28 ` [PULL 02/17] hostmem: default the amount of prealloc-threads to smp-cpus Paolo Bonzini
2022-05-25 19:28 ` [PULL 03/17] thread-pool: optimize scheduling of completion bottom half Paolo Bonzini
2022-05-25 19:28 ` [PULL 04/17] thread-pool: replace semaphore with condition variable Paolo Bonzini
2022-05-25 19:28 ` [PULL 05/17] thread-pool: remove stopping variable Paolo Bonzini
2022-05-25 19:28 ` [PULL 06/17] contrib/elf2dmp: add ELF dump header checking Paolo Bonzini
2022-05-25 19:28 ` [PULL 07/17] hw/audio/ac97: Coding style fixes to avoid checkpatch errors Paolo Bonzini
2022-05-25 19:28 ` [PULL 08/17] hw/audio/ac97: Remove unimplemented reset functions Paolo Bonzini
2022-05-25 19:28 ` [PULL 09/17] hw/audio/ac97: Remove unneeded local variables Paolo Bonzini
2022-05-25 19:28 ` [PULL 10/17] target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable host Paolo Bonzini
2022-05-25 19:28 ` [PULL 11/17] ide_ioport_read: Return lower octet of data register instead of 0xFF Paolo Bonzini
2022-05-25 19:28 ` [PULL 12/17] i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES Paolo Bonzini
2022-05-25 19:28 ` [PULL 13/17] i386: Hyper-V Enlightened MSR bitmap feature Paolo Bonzini
2022-05-25 19:28 ` [PULL 14/17] i386: Hyper-V XMM fast hypercall input feature Paolo Bonzini
2022-05-25 19:28 ` Paolo Bonzini [this message]
2022-05-25 19:28 ` [PULL 16/17] i386: Hyper-V Direct TLB flush hypercall Paolo Bonzini
2022-05-25 19:28 ` [PULL 17/17] i386: docs: Convert hyperv.txt to rST Paolo Bonzini
2022-05-25 22:20 ` [PULL 00/17] Misc patches for 2022-05-25 Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220525192852.301633-16-pbonzini@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=vkuznets@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.