From: David Virag <virag.david003@gmail.com> To: unlisted-recipients:; (no To-header on input) Cc: phone-devel@vger.kernel.org, David Virag <virag.david003@gmail.com>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Tomasz Figa <tomasz.figa@gmail.com>, Chanwoo Choi <cw00.choi@samsung.com>, Alim Akhtar <alim.akhtar@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] dt-bindings: clock: Add indices for Exynos7885 TREX clocks Date: Thu, 2 Jun 2022 01:37:40 +0200 [thread overview] Message-ID: <20220601233743.56317-3-virag.david003@gmail.com> (raw) In-Reply-To: <20220601233743.56317-1-virag.david003@gmail.com> TREX D Core and P core clocks seem to be related to the BTS (Bus Traffic Shaper) inside the Exynos7885 SoC, and are needed for the SoC to function correctly. Add indices for these clocks. Signed-off-by: David Virag <virag.david003@gmail.com> --- include/dt-bindings/clock/exynos7885.h | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/include/dt-bindings/clock/exynos7885.h b/include/dt-bindings/clock/exynos7885.h index d2e1483f93e4..8256e7430b63 100644 --- a/include/dt-bindings/clock/exynos7885.h +++ b/include/dt-bindings/clock/exynos7885.h @@ -72,14 +72,21 @@ #define TOP_NR_CLK 61 /* CMU_CORE */ -#define CLK_MOUT_CORE_BUS_USER 1 -#define CLK_MOUT_CORE_CCI_USER 2 -#define CLK_MOUT_CORE_G3D_USER 3 -#define CLK_MOUT_CORE_GIC 4 -#define CLK_DOUT_CORE_BUSP 5 -#define CLK_GOUT_CCI_ACLK 6 -#define CLK_GOUT_GIC400_CLK 7 -#define CORE_NR_CLK 8 +#define CLK_MOUT_CORE_BUS_USER 1 +#define CLK_MOUT_CORE_CCI_USER 2 +#define CLK_MOUT_CORE_G3D_USER 3 +#define CLK_MOUT_CORE_GIC 4 +#define CLK_DOUT_CORE_BUSP 5 +#define CLK_GOUT_CCI_ACLK 6 +#define CLK_GOUT_GIC400_CLK 7 +#define CLK_GOUT_TREX_D_CORE_ACLK 8 +#define CLK_GOUT_TREX_D_CORE_GCLK 9 +#define CLK_GOUT_TREX_D_CORE_PCLK 10 +#define CLK_GOUT_TREX_P_CORE_ACLK_P_CORE 11 +#define CLK_GOUT_TREX_P_CORE_CCLK_P_CORE 12 +#define CLK_GOUT_TREX_P_CORE_PCLK 13 +#define CLK_GOUT_TREX_P_CORE_PCLK_P_CORE 14 +#define CORE_NR_CLK 15 /* CMU_PERI */ #define CLK_MOUT_PERI_BUS_USER 1 -- 2.36.1
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From: David Virag <virag.david003@gmail.com> Cc: phone-devel@vger.kernel.org, David Virag <virag.david003@gmail.com>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Tomasz Figa <tomasz.figa@gmail.com>, Chanwoo Choi <cw00.choi@samsung.com>, Alim Akhtar <alim.akhtar@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] dt-bindings: clock: Add indices for Exynos7885 TREX clocks Date: Thu, 2 Jun 2022 01:37:40 +0200 [thread overview] Message-ID: <20220601233743.56317-3-virag.david003@gmail.com> (raw) In-Reply-To: <20220601233743.56317-1-virag.david003@gmail.com> TREX D Core and P core clocks seem to be related to the BTS (Bus Traffic Shaper) inside the Exynos7885 SoC, and are needed for the SoC to function correctly. Add indices for these clocks. Signed-off-by: David Virag <virag.david003@gmail.com> --- include/dt-bindings/clock/exynos7885.h | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/include/dt-bindings/clock/exynos7885.h b/include/dt-bindings/clock/exynos7885.h index d2e1483f93e4..8256e7430b63 100644 --- a/include/dt-bindings/clock/exynos7885.h +++ b/include/dt-bindings/clock/exynos7885.h @@ -72,14 +72,21 @@ #define TOP_NR_CLK 61 /* CMU_CORE */ -#define CLK_MOUT_CORE_BUS_USER 1 -#define CLK_MOUT_CORE_CCI_USER 2 -#define CLK_MOUT_CORE_G3D_USER 3 -#define CLK_MOUT_CORE_GIC 4 -#define CLK_DOUT_CORE_BUSP 5 -#define CLK_GOUT_CCI_ACLK 6 -#define CLK_GOUT_GIC400_CLK 7 -#define CORE_NR_CLK 8 +#define CLK_MOUT_CORE_BUS_USER 1 +#define CLK_MOUT_CORE_CCI_USER 2 +#define CLK_MOUT_CORE_G3D_USER 3 +#define CLK_MOUT_CORE_GIC 4 +#define CLK_DOUT_CORE_BUSP 5 +#define CLK_GOUT_CCI_ACLK 6 +#define CLK_GOUT_GIC400_CLK 7 +#define CLK_GOUT_TREX_D_CORE_ACLK 8 +#define CLK_GOUT_TREX_D_CORE_GCLK 9 +#define CLK_GOUT_TREX_D_CORE_PCLK 10 +#define CLK_GOUT_TREX_P_CORE_ACLK_P_CORE 11 +#define CLK_GOUT_TREX_P_CORE_CCLK_P_CORE 12 +#define CLK_GOUT_TREX_P_CORE_PCLK 13 +#define CLK_GOUT_TREX_P_CORE_PCLK_P_CORE 14 +#define CORE_NR_CLK 15 /* CMU_PERI */ #define CLK_MOUT_PERI_BUS_USER 1 -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-06-01 21:39 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-01 23:37 [PATCH 0/5] Bring up internal eMMC on Samsung Galaxy A8 (2018) David Virag 2022-06-01 23:37 ` David Virag 2022-06-01 23:37 ` [PATCH 1/5] dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS David Virag 2022-06-01 23:37 ` David Virag 2022-06-02 11:54 ` Krzysztof Kozlowski 2022-06-02 11:54 ` Krzysztof Kozlowski 2022-06-08 15:12 ` Krzysztof Kozlowski 2022-06-08 15:12 ` Krzysztof Kozlowski 2022-06-20 10:31 ` Sylwester Nawrocki 2022-06-20 10:31 ` Sylwester Nawrocki [not found] ` <CGME20220620102819eucas1p2b03a01c45ca3d0d42ebb9542954f0a4a@eucas1p2.samsung.com> 2022-06-20 10:28 ` Sylwester Nawrocki 2022-06-20 10:28 ` Sylwester Nawrocki 2022-06-20 12:27 ` (subset) " Krzysztof Kozlowski 2022-06-20 12:27 ` Krzysztof Kozlowski 2022-06-01 23:37 ` David Virag [this message] 2022-06-01 23:37 ` [PATCH 2/5] dt-bindings: clock: Add indices for Exynos7885 TREX clocks David Virag 2022-06-02 11:55 ` Krzysztof Kozlowski 2022-06-02 11:55 ` Krzysztof Kozlowski 2022-06-20 12:27 ` (subset) " Krzysztof Kozlowski 2022-06-20 12:27 ` Krzysztof Kozlowski 2022-06-01 23:37 ` [PATCH 3/5] clk: samsung: exynos7885: Implement CMU_FSYS domain David Virag 2022-06-01 23:37 ` David Virag 2022-06-02 11:56 ` Krzysztof Kozlowski 2022-06-02 11:56 ` Krzysztof Kozlowski 2022-06-01 23:37 ` [PATCH 4/5] clk: samsung: exynos7885: Add TREX clocks David Virag 2022-06-01 23:37 ` David Virag 2022-06-02 11:56 ` Krzysztof Kozlowski 2022-06-02 11:56 ` Krzysztof Kozlowski 2022-06-01 23:37 ` [PATCH 5/5] arm64: dts: exynos: Add internal eMMC support to jackpotlte David Virag 2022-06-01 23:37 ` David Virag 2022-06-02 12:01 ` Krzysztof Kozlowski 2022-06-02 12:01 ` Krzysztof Kozlowski 2022-06-02 22:18 ` David Virag 2022-06-02 22:18 ` David Virag 2022-06-03 7:38 ` Krzysztof Kozlowski 2022-06-03 7:38 ` Krzysztof Kozlowski 2022-06-20 12:27 ` (subset) " Krzysztof Kozlowski 2022-06-20 12:27 ` Krzysztof Kozlowski
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