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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Simon Xue <xxm@rock-chips.com>
Cc: "Serge Semin" <Sergey.Semin@baikalelectronics.ru>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
	"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Frank Li" <Frank.Li@nxp.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: [PATCH v3 11/17] dt-bindings: PCI: dwc: Apply common schema to Rockchip DW PCIe nodes
Date: Fri, 10 Jun 2022 11:56:59 +0300	[thread overview]
Message-ID: <20220610085706.15741-12-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220610085706.15741-1-Sergey.Semin@baikalelectronics.ru>

As the DT-bindings description states the Rockchip PCIe controller is
based on the DW PCIe RP IP-core thus its DT-nodes are supposed to be
compatible with the common DW PCIe controller schema. Let's make sure they
evaluated against it by referring to the snps,dw-pcie-common.yaml schema
in the allOf sub-schemas composition.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>

---

Changelog v3:
- This is a new patch created on v3 lap of the series.
---
 Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
index 142bbe577763..d5de609f2145 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
@@ -14,10 +14,11 @@ maintainers:
 description: |+
   RK3568 SoC PCIe host controller is based on the Synopsys DesignWare
   PCIe IP and thus inherits all the common properties defined in
-  designware-pcie.txt.
+  snps,dw-pcie-common.yaml.
 
 allOf:
   - $ref: /schemas/pci/pci-bus.yaml#
+  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
 
 # We need a select here so we don't match all nodes with 'snps,dw-pcie'
 select:
-- 
2.35.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Simon Xue <xxm@rock-chips.com>
Cc: "Serge Semin" <Sergey.Semin@baikalelectronics.ru>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
	"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Frank Li" <Frank.Li@nxp.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: [PATCH v3 11/17] dt-bindings: PCI: dwc: Apply common schema to Rockchip DW PCIe nodes
Date: Fri, 10 Jun 2022 11:56:59 +0300	[thread overview]
Message-ID: <20220610085706.15741-12-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220610085706.15741-1-Sergey.Semin@baikalelectronics.ru>

As the DT-bindings description states the Rockchip PCIe controller is
based on the DW PCIe RP IP-core thus its DT-nodes are supposed to be
compatible with the common DW PCIe controller schema. Let's make sure they
evaluated against it by referring to the snps,dw-pcie-common.yaml schema
in the allOf sub-schemas composition.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>

---

Changelog v3:
- This is a new patch created on v3 lap of the series.
---
 Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
index 142bbe577763..d5de609f2145 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
@@ -14,10 +14,11 @@ maintainers:
 description: |+
   RK3568 SoC PCIe host controller is based on the Synopsys DesignWare
   PCIe IP and thus inherits all the common properties defined in
-  designware-pcie.txt.
+  snps,dw-pcie-common.yaml.
 
 allOf:
   - $ref: /schemas/pci/pci-bus.yaml#
+  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
 
 # We need a select here so we don't match all nodes with 'snps,dw-pcie'
 select:
-- 
2.35.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Simon Xue <xxm@rock-chips.com>
Cc: "Serge Semin" <Sergey.Semin@baikalelectronics.ru>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
	"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Frank Li" <Frank.Li@nxp.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: [PATCH v3 11/17] dt-bindings: PCI: dwc: Apply common schema to Rockchip DW PCIe nodes
Date: Fri, 10 Jun 2022 11:56:59 +0300	[thread overview]
Message-ID: <20220610085706.15741-12-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220610085706.15741-1-Sergey.Semin@baikalelectronics.ru>

As the DT-bindings description states the Rockchip PCIe controller is
based on the DW PCIe RP IP-core thus its DT-nodes are supposed to be
compatible with the common DW PCIe controller schema. Let's make sure they
evaluated against it by referring to the snps,dw-pcie-common.yaml schema
in the allOf sub-schemas composition.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>

---

Changelog v3:
- This is a new patch created on v3 lap of the series.
---
 Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
index 142bbe577763..d5de609f2145 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
@@ -14,10 +14,11 @@ maintainers:
 description: |+
   RK3568 SoC PCIe host controller is based on the Synopsys DesignWare
   PCIe IP and thus inherits all the common properties defined in
-  designware-pcie.txt.
+  snps,dw-pcie-common.yaml.
 
 allOf:
   - $ref: /schemas/pci/pci-bus.yaml#
+  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
 
 # We need a select here so we don't match all nodes with 'snps,dw-pcie'
 select:
-- 
2.35.1


  parent reply	other threads:[~2022-06-10  8:58 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-10  8:56 [PATCH v3 00/17] PCI: dwc: Add generic resources and Baikal-T1 support Serge Semin
2022-06-10  8:56 ` [PATCH v3 01/17] dt-bindings: PCI: dwc: Detach common RP/EP DT bindings Serge Semin
2022-06-10  8:56 ` [PATCH v3 02/17] dt-bindings: PCI: dwc: Remove bus node from the examples Serge Semin
2022-06-15 16:30   ` Rob Herring
2022-06-10  8:56 ` [PATCH v3 03/17] dt-bindings: PCI: dwc: Add phys/phy-names common properties Serge Semin
2022-06-10  8:56 ` [PATCH v3 04/17] dt-bindings: PCI: dwc: Add max-link-speed common property Serge Semin
2022-06-15 14:55   ` Rob Herring
2022-06-19 14:27     ` Serge Semin
2022-06-28 12:15       ` Serge Semin
2022-06-28 14:56         ` Rob Herring
2022-06-29  1:50           ` Serge Semin
2022-07-01 14:44       ` Rob Herring
2022-07-07 19:02         ` Serge Semin
2022-06-10  8:56 ` [PATCH v3 05/17] dt-bindings: PCI: dwc: Stop selecting generic bindings by default Serge Semin
2022-06-10  8:56   ` Serge Semin
2022-06-10  8:56   ` Serge Semin
2022-06-10  8:56 ` [PATCH v3 06/17] dt-bindings: PCI: dwc: Add max-functions EP property Serge Semin
2022-06-15 16:31   ` Rob Herring
2022-06-10  8:56 ` [PATCH v3 07/17] dt-bindings: PCI: dwc: Add interrupts/interrupt-names common properties Serge Semin
2022-06-15 15:32   ` Rob Herring
2022-06-19 16:37     ` Serge Semin
2022-06-28 12:18       ` Serge Semin
2022-07-07 19:25       ` Serge Semin
2022-06-10  8:56 ` [PATCH v3 08/17] dt-bindings: PCI: dwc: Add reg/reg-names " Serge Semin
2022-06-10  8:56 ` [PATCH v3 09/17] dt-bindings: PCI: dwc: Add clocks/resets " Serge Semin
2022-06-10  8:56   ` Serge Semin
2022-06-10  8:56 ` [PATCH v3 10/17] dt-bindings: PCI: dwc: Add dma-coherent property Serge Semin
2022-06-10  8:56 ` Serge Semin [this message]
2022-06-10  8:56   ` [PATCH v3 11/17] dt-bindings: PCI: dwc: Apply common schema to Rockchip DW PCIe nodes Serge Semin
2022-06-10  8:56   ` Serge Semin
2022-06-10 13:12   ` Rob Herring
2022-06-10 13:12     ` Rob Herring
2022-06-10 13:12     ` Rob Herring
2022-06-10 21:13     ` Serge Semin
2022-06-10 21:13       ` Serge Semin
2022-06-10 21:13       ` Serge Semin
2022-06-10  8:57 ` [PATCH v3 12/17] dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings Serge Semin
2022-06-15 16:37   ` Rob Herring
2022-06-19 20:03     ` Serge Semin
2022-06-28 12:19       ` Serge Semin
2022-07-01 14:59       ` Rob Herring
2022-07-07 19:19         ` Serge Semin
2022-06-10  8:57 ` [PATCH v3 13/17] PCI: dwc: Introduce generic controller capabilities interface Serge Semin
2022-06-15 16:42   ` Rob Herring
2022-06-10  8:57 ` [PATCH v3 14/17] PCI: dwc: Introduce generic resources getter Serge Semin
2022-06-15 16:46   ` Rob Herring
2022-06-10  8:57 ` [PATCH v3 15/17] PCI: dwc: Combine iATU detection procedures Serge Semin
2022-06-15 16:47   ` Rob Herring
2022-06-10  8:57 ` [PATCH v3 16/17] PCI: dwc: Introduce generic platform clocks and resets Serge Semin
2022-06-10  8:57 ` [PATCH v3 17/17] PCI: dwc: Add Baikal-T1 PCIe controller support Serge Semin
2022-06-15 16:48   ` Bjorn Helgaas
2022-06-20 17:13     ` Serge Semin
2022-06-21 18:29       ` Bjorn Helgaas
2022-06-22 17:04         ` Serge Semin
2022-06-28 12:23           ` Serge Semin
2022-06-28 15:17             ` Bjorn Helgaas
2022-06-15 17:10   ` Rob Herring
2022-06-19 20:39     ` Serge Semin
2022-07-12 20:29       ` Rob Herring
2022-07-12 20:58         ` Serge Semin

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