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From: Jacky Bai <ping.bai@nxp.com>
To: linus.walleij@linaro.org, shawnguo@kernel.org, aisheng.dong@nxp.com
Cc: festevam@gmail.com, kernel@pengutronix.de, linux-imx@nxp.com,
	linux-gpio@vger.kernel.org
Subject: [PATCH] pinctrl: imx: Add the zero base flag for imx93
Date: Mon, 13 Jun 2022 11:18:54 +0800	[thread overview]
Message-ID: <20220613031854.1571357-1-ping.bai@nxp.com> (raw)

On i.MX93, the pin mux reg offset is from 0x0,
so need to add the 'ZERO_OFFSET_VALID' flag to make
sure the pin at mux offset 0 can be found.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
 drivers/pinctrl/freescale/pinctrl-imx93.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx93.c b/drivers/pinctrl/freescale/pinctrl-imx93.c
index c0630f69e995..417e41b37a6f 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx93.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx93.c
@@ -239,6 +239,7 @@ static const struct pinctrl_pin_desc imx93_pinctrl_pads[] = {
 static const struct imx_pinctrl_soc_info imx93_pinctrl_info = {
 	.pins = imx93_pinctrl_pads,
 	.npins = ARRAY_SIZE(imx93_pinctrl_pads),
+	.flags = ZERO_OFFSET_VALID,
 	.gpr_compatible = "fsl,imx93-iomuxc-gpr",
 };
 
-- 
2.25.1


             reply	other threads:[~2022-06-13  3:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-13  3:18 Jacky Bai [this message]
2022-06-23  1:41 ` [PATCH] pinctrl: imx: Add the zero base flag for imx93 Jacky Bai
2022-06-28 13:17 ` Linus Walleij
2022-07-04  6:04   ` Jacky Bai
2022-07-06 12:51     ` Linus Walleij

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