From: Viorel Suman <viorel.suman@nxp.com> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Dmitry Torokhov <dmitry.torokhov@gmail.com>, Srinivas Kandagatla <srinivas.kandagatla@linaro.org>, Dong Aisheng <aisheng.dong@nxp.com>, Fabio Estevam <festevam@gmail.com>, Shawn Guo <shawnguo@kernel.org>, Stefan Agner <stefan@agner.ch>, Pengutronix Kernel Team <kernel@pengutronix.de>, Linus Walleij <linus.walleij@linaro.org>, Alessandro Zummo <a.zummo@towertech.it>, Alexandre Belloni <alexandre.belloni@bootlin.com>, "Rafael J. Wysocki" <rafael@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Amit Kucheria <amitk@kernel.org>, Zhang Rui <rui.zhang@intel.com>, Wim Van Sebroeck <wim@linux-watchdog.org>, Guenter Roeck <linux@roeck-us.net>, Sascha Hauer <s.hauer@pengutronix.de>, NXP Linux Team <linux-imx@nxp.com>, Abel Vesa <abel.vesa@nxp.com>, Viorel Suman <viorel.suman@nxp.com>, Mirela Rabulea <mirela.rabulea@nxp.com>, Liu Ying <victor.liu@nxp.com>, Oliver Graute <oliver.graute@kococonnector.com>, Peng Fan <peng.fan@nxp.com>, Shijie Qin <shijie.qin@nxp.com>, Ming Qian <ming.qian@nxp.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: LnxNXP@nxp.com Subject: [PATCH v4 02/14] dt-bindings: clk: imx: Add fsl,scu-clk yaml file Date: Wed, 15 Jun 2022 13:58:22 +0300 [thread overview] Message-ID: <20220615105834.743045-3-viorel.suman@nxp.com> (raw) In-Reply-To: <20220615105834.743045-1-viorel.suman@nxp.com> From: Abel Vesa <abel.vesa@nxp.com> In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'clock' child node of the SCU main node. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> --- .../bindings/clock/fsl,scu-clk.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml new file mode 100644 index 000000000000..8b59758eee4a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol + +maintainers: + - Abel Vesa <abel.vesa@nxp.com> + +description: i.MX SCU Client Device Node + Client nodes are maintained as children of the relevant IMX-SCU device node. + This binding uses the common clock binding. + (Documentation/devicetree/bindings/clock/clock-bindings.txt) + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. + See the full list of clock IDs from + include/dt-bindings/clock/imx8qxp-clock.h + +properties: + compatible: + items: + - enum: + - fsl,imx8dxl-clk + - fsl,imx8qm-clk + - fsl,imx8qxp-clk + - const: fsl,scu-clk + + '#clock-cells': + const: 2 + + clocks: + items: + - description: XTAL 32KHz + - description: XTAL 24MHz + minItems: 1 + + clock-names: + items: + enum: + - xtal_32KHz + - xtal_24Mhz + minItems: 1 + maxItems: 2 + +required: + - compatible + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; + #clock-cells = <2>; + }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Viorel Suman <viorel.suman@nxp.com> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Dmitry Torokhov <dmitry.torokhov@gmail.com>, Srinivas Kandagatla <srinivas.kandagatla@linaro.org>, Dong Aisheng <aisheng.dong@nxp.com>, Fabio Estevam <festevam@gmail.com>, Shawn Guo <shawnguo@kernel.org>, Stefan Agner <stefan@agner.ch>, Pengutronix Kernel Team <kernel@pengutronix.de>, Linus Walleij <linus.walleij@linaro.org>, Alessandro Zummo <a.zummo@towertech.it>, Alexandre Belloni <alexandre.belloni@bootlin.com>, "Rafael J. Wysocki" <rafael@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Amit Kucheria <amitk@kernel.org>, Zhang Rui <rui.zhang@intel.com>, Wim Van Sebroeck <wim@linux-watchdog.org>, Guenter Roeck <linux@roeck-us.net>, Sascha Hauer <s.hauer@pengutronix.de>, NXP Linux Team <linux-imx@nxp.com>, Abel Vesa <abel.vesa@nxp.com>, Viorel Suman <viorel.suman@nxp.com>, Mirela Rabulea <mirela.rabulea@nxp.com>, Liu Ying <victor.liu@nxp.com>, Oliver Graute <oliver.graute@kococonnector.com>, Peng Fan <peng.fan@nxp.com>, Shijie Qin <shijie.qin@nxp.com>, Ming Qian <ming.qian@nxp.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: LnxNXP@nxp.com Subject: [PATCH v4 02/14] dt-bindings: clk: imx: Add fsl,scu-clk yaml file Date: Wed, 15 Jun 2022 13:58:22 +0300 [thread overview] Message-ID: <20220615105834.743045-3-viorel.suman@nxp.com> (raw) In-Reply-To: <20220615105834.743045-1-viorel.suman@nxp.com> From: Abel Vesa <abel.vesa@nxp.com> In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'clock' child node of the SCU main node. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> --- .../bindings/clock/fsl,scu-clk.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml new file mode 100644 index 000000000000..8b59758eee4a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol + +maintainers: + - Abel Vesa <abel.vesa@nxp.com> + +description: i.MX SCU Client Device Node + Client nodes are maintained as children of the relevant IMX-SCU device node. + This binding uses the common clock binding. + (Documentation/devicetree/bindings/clock/clock-bindings.txt) + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. + See the full list of clock IDs from + include/dt-bindings/clock/imx8qxp-clock.h + +properties: + compatible: + items: + - enum: + - fsl,imx8dxl-clk + - fsl,imx8qm-clk + - fsl,imx8qxp-clk + - const: fsl,scu-clk + + '#clock-cells': + const: 2 + + clocks: + items: + - description: XTAL 32KHz + - description: XTAL 24MHz + minItems: 1 + + clock-names: + items: + enum: + - xtal_32KHz + - xtal_24Mhz + minItems: 1 + maxItems: 2 + +required: + - compatible + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; + #clock-cells = <2>; + }; -- 2.25.1
next prev parent reply other threads:[~2022-06-15 11:00 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-15 10:58 [PATCH v4 00/14] dt-bindings: arm: freescale: Switch fsl,scu from txt to yaml Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 01/14] arm64: dts: freescale: imx8qxp: Fix thermal zone name for cpu0 Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 14:12 ` Krzysztof Kozlowski 2022-06-15 14:12 ` Krzysztof Kozlowski 2022-06-15 10:58 ` Viorel Suman [this message] 2022-06-15 10:58 ` [PATCH v4 02/14] dt-bindings: clk: imx: Add fsl,scu-clk yaml file Viorel Suman 2022-06-15 10:58 ` [PATCH v4 03/14] dt-bindings: pinctrl: imx: Add fsl,scu-iomux " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 04/14] dt-bindings: input: Add fsl,scu-key " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 05/14] dt-bindings: nvmem: Add fsl,scu-ocotp " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 06/14] dt-bindings: power: Add fsl,scu-pd " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 07/14] dt-bindings: rtc: Add fsl,scu-rtc " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 08/14] dt-bindings: thermal: Add fsl,scu-thermal " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 09/14] dt-bindings: watchdog: Add fsl,scu-wdt " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 10/14] dt-bindings: firmware: Add fsl,scu " Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 11/14] arm64: dts: freescale: imx8: Fix power controller name Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 12/14] arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controller Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 13/14] arm64: dts: freescale: imx8qxp: Fix the keys node name Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-15 10:58 ` [PATCH v4 14/14] dt-bindings: arm: freescale: Remove fsl,scu txt file Viorel Suman 2022-06-15 10:58 ` Viorel Suman 2022-06-16 16:48 ` [PATCH v4 00/14] dt-bindings: arm: freescale: Switch fsl,scu from txt to yaml Viorel Suman 2022-06-16 16:48 ` Viorel Suman
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