From: Conor Dooley <mail@conchuod.ie> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Daire McNamara <daire.mcnamara@microchip.com>, Conor Dooley <conor.dooley@microchip.com>, Niklas Cassel <niklas.cassel@wdc.com>, Damien Le Moal <damien.lemoal@opensource.wdc.com>, Geert Uytterhoeven <geert@linux-m68k.org>, Zong Li <zong.li@sifive.com>, Emil Renner Berthing <kernel@esmil.dk>, Jonas Hahnfeld <hahnjo@hahnjo.de> Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Brice Goglin <Brice.Goglin@inria.fr> Subject: [PATCH 2/5] riscv: dts: sifive: Add fu540 topology information Date: Tue, 5 Jul 2022 20:04:33 +0100 [thread overview] Message-ID: <20220705190435.1790466-3-mail@conchuod.ie> (raw) In-Reply-To: <20220705190435.1790466-1-mail@conchuod.ie> From: Conor Dooley <conor.dooley@microchip.com> The fu540 has no cpu-map node, so tools like hwloc cannot correctly parse the topology. Add the node using the existing node labels. Reported-by: Brice Goglin <Brice.Goglin@inria.fr> Link: https://github.com/open-mpi/hwloc/issues/536 Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index e3172d0ffac4..24bba83bec77 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -133,6 +133,30 @@ cpu4_intc: interrupt-controller { interrupt-controller; }; }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + + core2 { + cpu = <&cpu2>; + }; + + core3 { + cpu = <&cpu3>; + }; + + core4 { + cpu = <&cpu4>; + }; + }; + }; }; soc { #address-cells = <2>; -- 2.37.0
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <mail@conchuod.ie> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Daire McNamara <daire.mcnamara@microchip.com>, Conor Dooley <conor.dooley@microchip.com>, Niklas Cassel <niklas.cassel@wdc.com>, Damien Le Moal <damien.lemoal@opensource.wdc.com>, Geert Uytterhoeven <geert@linux-m68k.org>, Zong Li <zong.li@sifive.com>, Emil Renner Berthing <kernel@esmil.dk>, Jonas Hahnfeld <hahnjo@hahnjo.de> Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Brice Goglin <Brice.Goglin@inria.fr> Subject: [PATCH 2/5] riscv: dts: sifive: Add fu540 topology information Date: Tue, 5 Jul 2022 20:04:33 +0100 [thread overview] Message-ID: <20220705190435.1790466-3-mail@conchuod.ie> (raw) In-Reply-To: <20220705190435.1790466-1-mail@conchuod.ie> From: Conor Dooley <conor.dooley@microchip.com> The fu540 has no cpu-map node, so tools like hwloc cannot correctly parse the topology. Add the node using the existing node labels. Reported-by: Brice Goglin <Brice.Goglin@inria.fr> Link: https://github.com/open-mpi/hwloc/issues/536 Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index e3172d0ffac4..24bba83bec77 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -133,6 +133,30 @@ cpu4_intc: interrupt-controller { interrupt-controller; }; }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + + core2 { + cpu = <&cpu2>; + }; + + core3 { + cpu = <&cpu3>; + }; + + core4 { + cpu = <&cpu4>; + }; + }; + }; }; soc { #address-cells = <2>; -- 2.37.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-07-05 19:05 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-05 19:04 [PATCH 0/5] RISC-V: Add cpu-map topology information nodes Conor Dooley 2022-07-05 19:04 ` Conor Dooley 2022-07-05 19:04 ` [PATCH 1/5] riscv: dts: starfive: Add JH7100 CPU topology Conor Dooley 2022-07-05 19:04 ` Conor Dooley 2022-07-05 19:04 ` Conor Dooley [this message] 2022-07-05 19:04 ` [PATCH 2/5] riscv: dts: sifive: Add fu540 topology information Conor Dooley 2022-07-05 19:04 ` [PATCH 3/5] riscv: dts: sifive: Add fu740 " Conor Dooley 2022-07-05 19:04 ` Conor Dooley 2022-07-05 19:04 ` [PATCH 4/5] riscv: dts: microchip: Add mpfs' " Conor Dooley 2022-07-05 19:04 ` Conor Dooley 2022-07-14 22:04 ` Palmer Dabbelt 2022-07-14 22:04 ` Palmer Dabbelt 2022-07-05 19:04 ` [PATCH 5/5] riscv: dts: canaan: Add k210 " Conor Dooley 2022-07-05 19:04 ` Conor Dooley 2022-07-06 3:49 ` Damien Le Moal 2022-07-06 3:49 ` Damien Le Moal 2022-07-05 20:19 ` [PATCH 0/5] RISC-V: Add cpu-map topology information nodes Sudeep Holla 2022-07-05 20:19 ` Sudeep Holla 2022-07-05 20:33 ` Conor.Dooley 2022-07-05 20:33 ` Conor.Dooley 2022-07-05 23:03 ` Conor.Dooley 2022-07-05 23:03 ` Conor.Dooley 2022-07-06 9:21 ` Sudeep Holla 2022-07-06 9:21 ` Sudeep Holla 2022-07-06 9:43 ` Conor.Dooley 2022-07-06 9:43 ` Conor.Dooley 2022-07-06 10:03 ` Sudeep Holla 2022-07-06 10:03 ` Sudeep Holla 2022-07-06 10:11 ` Conor.Dooley 2022-07-06 10:11 ` Conor.Dooley 2022-07-06 13:04 ` Conor.Dooley 2022-07-06 13:04 ` Conor.Dooley 2022-07-06 14:00 ` Sudeep Holla 2022-07-06 14:00 ` Sudeep Holla 2022-07-06 9:18 ` Sudeep Holla 2022-07-06 9:18 ` Sudeep Holla 2022-07-07 22:29 ` (subset) " Conor Dooley 2022-07-07 22:29 ` Conor Dooley
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