From: Matt Ranostay <mranostay@ti.com> To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH RESEND 4/6] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Date: Wed, 6 Jul 2022 23:25:01 -0700 [thread overview] Message-ID: <20220707062503.295663-5-mranostay@ti.com> (raw) In-Reply-To: <20220707062503.295663-1-mranostay@ti.com> From: Aswath Govindraju <a-govindraju@ti.com> Configure first lane to PCIe, the second lane to USB and the last two lanes to eDP. Also, add sub-nodes to SERDES0 DT node to represent SERDES0 is connected to PCIe. Acked-by: Matt Ranostay <mranostay@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> --- .../dts/ti/k3-j721s2-common-proc-board.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index b210cc07c539..791f235bd95f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -9,6 +9,9 @@ #include "k3-j721s2-som-p0.dtsi" #include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/mux/ti-serdes.h> / { compatible = "ti,j721s2-evm", "ti,j721s2"; @@ -350,6 +353,25 @@ &cpsw_port1 { phy-handle = <&phy0>; }; +&serdes_ln_ctrl { + idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>, + <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>; +}; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + serdes0_pcie_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + resets = <&serdes_wiz0 1>; + }; +}; + &mcu_mcan0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_mcan0_pins_default>; -- 2.36.1
WARNING: multiple messages have this Message-ID (diff)
From: Matt Ranostay <mranostay@ti.com> To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH RESEND 4/6] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Date: Wed, 6 Jul 2022 23:25:01 -0700 [thread overview] Message-ID: <20220707062503.295663-5-mranostay@ti.com> (raw) In-Reply-To: <20220707062503.295663-1-mranostay@ti.com> From: Aswath Govindraju <a-govindraju@ti.com> Configure first lane to PCIe, the second lane to USB and the last two lanes to eDP. Also, add sub-nodes to SERDES0 DT node to represent SERDES0 is connected to PCIe. Acked-by: Matt Ranostay <mranostay@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> --- .../dts/ti/k3-j721s2-common-proc-board.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index b210cc07c539..791f235bd95f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -9,6 +9,9 @@ #include "k3-j721s2-som-p0.dtsi" #include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/mux/ti-serdes.h> / { compatible = "ti,j721s2-evm", "ti,j721s2"; @@ -350,6 +353,25 @@ &cpsw_port1 { phy-handle = <&phy0>; }; +&serdes_ln_ctrl { + idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>, + <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>; +}; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + serdes0_pcie_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + resets = <&serdes_wiz0 1>; + }; +}; + &mcu_mcan0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_mcan0_pins_default>; -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-07-07 6:25 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-07 6:24 [PATCH RESEND 0/6] J721S2: Add support for additional IPs Matt Ranostay 2022-07-07 6:24 ` Matt Ranostay 2022-07-07 6:24 ` [PATCH RESEND 1/6] arm64: dts: ti: k3-j721s2-main: Add support for USB Matt Ranostay 2022-07-07 6:24 ` Matt Ranostay 2022-07-07 6:24 ` [PATCH RESEND 2/6] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Matt Ranostay 2022-07-07 6:24 ` Matt Ranostay 2022-07-07 6:25 ` [PATCH RESEND 3/6] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Matt Ranostay 2022-07-07 6:25 ` Matt Ranostay 2022-07-07 6:25 ` Matt Ranostay [this message] 2022-07-07 6:25 ` [PATCH RESEND 4/6] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Matt Ranostay 2022-07-07 6:25 ` [PATCH RESEND 5/6] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support Matt Ranostay 2022-07-07 6:25 ` Matt Ranostay 2022-07-07 6:25 ` [PATCH RESEND 6/6] arm64: dts: k3-j721s2: Add support for OSPI Flashes Matt Ranostay 2022-07-07 6:25 ` Matt Ranostay 2022-08-10 9:39 [PATCH RESEND 1/6] arm64: dts: ti: k3-j721s2-main: Add support for USB Matt Ranostay 2022-08-10 9:39 ` [PATCH RESEND 4/6] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Matt Ranostay 2022-08-10 9:39 ` Matt Ranostay
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