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From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <chris.paterson2@renesas.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 5.10.y-cip 01/24] soc: renesas: Consolidate product register handling
Date: Fri, 15 Jul 2022 08:22:21 +0100	[thread overview]
Message-ID: <20220715072244.2298757-2-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20220715072244.2298757-1-biju.das.jz@bp.renesas.com>

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 05b22caa7490e4f4c94bbde33c61cf72d187b8f7 upstream.

Currently renesas_soc_init() scans the whole device tree up to three
times, to find a device node describing a product register.
Furthermore, the product register handling for the different variants is
very similar, with the major difference being the location of the
product bitfield inside the product register.

Reduce scanning to a single pass using of_find_matching_node_and_match()
instead.  Switch to a common handling of product registers, by storing
the intrinsics of each product register type in the data field of the
corresponding match entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/soc/renesas/renesas-soc.c | 115 +++++++++++++++---------------
 1 file changed, 56 insertions(+), 59 deletions(-)

diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 8310fce7714e..95d5e7063ef4 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -317,94 +317,92 @@ static const struct of_device_id renesas_socs[] __initconst = {
 	{ /* sentinel */ }
 };
 
+struct renesas_id {
+	unsigned int offset;
+	u32 mask;
+};
+
+static const struct renesas_id id_bsid __initconst = {
+	.offset = 0,
+	.mask = 0xff0000,
+	/*
+	 * TODO: Upper 4 bits of BSID are for chip version, but the format is
+	 * not known at this time so we don't know how to specify eshi and eslo
+	 */
+};
+
+static const struct renesas_id id_rzg2l __initconst = {
+	.offset = 0xa04,
+	.mask = 0xfffffff,
+};
+
+static const struct renesas_id id_prr __initconst = {
+	.offset = 0,
+	.mask = 0xff00,
+};
+
+static const struct of_device_id renesas_ids[] __initconst = {
+	{ .compatible = "renesas,bsid",			.data = &id_bsid },
+	{ .compatible = "renesas,r9a07g044-sysc",	.data = &id_rzg2l },
+	{ .compatible = "renesas,prr",			.data = &id_prr },
+	{ /* sentinel */ }
+};
+
 static int __init renesas_soc_init(void)
 {
 	struct soc_device_attribute *soc_dev_attr;
+	unsigned int product, eshi = 0, eslo;
 	const struct renesas_family *family;
 	const struct of_device_id *match;
 	const struct renesas_soc *soc;
+	const struct renesas_id *id;
 	void __iomem *chipid = NULL;
 	struct soc_device *soc_dev;
 	struct device_node *np;
-	unsigned int product, eshi = 0, eslo;
+	const char *soc_id;
 
 	match = of_match_node(renesas_socs, of_root);
 	if (!match)
 		return -ENODEV;
 
+	soc_id = strchr(match->compatible, ',') + 1;
 	soc = match->data;
 	family = soc->family;
 
-	np = of_find_compatible_node(NULL, NULL, "renesas,bsid");
+	np = of_find_matching_node_and_match(NULL, renesas_ids, &match);
 	if (np) {
+		id = match->data;
 		chipid = of_iomap(np, 0);
 		of_node_put(np);
-
-		if (chipid) {
-			product = readl(chipid);
-			iounmap(chipid);
-
-			if (soc->id && ((product >> 16) & 0xff) != soc->id) {
-				pr_warn("SoC mismatch (product = 0x%x)\n",
-					product);
-				return -ENODEV;
-			}
-		}
-
-		/*
-		 * TODO: Upper 4 bits of BSID are for chip version, but the
-		 * format is not known at this time so we don't know how to
-		 * specify eshi and eslo
-		 */
-
-		goto done;
+	} else if (soc->id && family->reg) {
+		/* Try hardcoded CCCR/PRR fallback */
+		id = &id_prr;
+		chipid = ioremap(family->reg, 4);
 	}
 
-	np = of_find_compatible_node(NULL, NULL, "renesas,r9a07g044-sysc");
-	if (np) {
-		chipid = of_iomap(np, 0);
-		of_node_put(np);
+	if (chipid) {
+		product = readl(chipid + id->offset);
+		iounmap(chipid);
 
-		if (chipid) {
-			product = readl(chipid + 0x0a04);
-			iounmap(chipid);
+		if (id == &id_prr) {
+			/* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
+			if ((product & 0x7fff) == 0x5210)
+				product ^= 0x11;
+			/* R-Car M3-W ES1.3 incorrectly identifies as ES2.1 */
+			if ((product & 0x7fff) == 0x5211)
+				product ^= 0x12;
 
-			if (soc->id && (product & 0xfffffff) != soc->id) {
-				pr_warn("SoC mismatch (product = 0x%x)\n",
-					product);
-				return -ENODEV;
-			}
+			eshi = ((product >> 4) & 0x0f) + 1;
+			eslo = product & 0xf;
 		}
 
-		goto done;
-	}
-
-	/* Try PRR first, then hardcoded fallback */
-	np = of_find_compatible_node(NULL, NULL, "renesas,prr");
-	if (np) {
-		chipid = of_iomap(np, 0);
-		of_node_put(np);
-	} else if (soc->id && family->reg) {
-		chipid = ioremap(family->reg, 4);
-	}
-	if (chipid) {
-		product = readl(chipid);
-		iounmap(chipid);
-		/* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
-		if ((product & 0x7fff) == 0x5210)
-			product ^= 0x11;
-		/* R-Car M3-W ES1.3 incorrectly identifies as ES2.1 */
-		if ((product & 0x7fff) == 0x5211)
-			product ^= 0x12;
-		if (soc->id && ((product >> 8) & 0xff) != soc->id) {
+		if (soc->id &&
+		    ((product & id->mask) >> __ffs(id->mask)) != soc->id) {
 			pr_warn("SoC mismatch (product = 0x%x)\n", product);
 			return -ENODEV;
 		}
-		eshi = ((product >> 4) & 0x0f) + 1;
-		eslo = product & 0xf;
 	}
 
-done:
 	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 	if (!soc_dev_attr)
 		return -ENOMEM;
@@ -414,8 +412,7 @@ static int __init renesas_soc_init(void)
 	of_node_put(np);
 
 	soc_dev_attr->family = kstrdup_const(family->name, GFP_KERNEL);
-	soc_dev_attr->soc_id = kstrdup_const(strchr(match->compatible, ',') + 1,
-					     GFP_KERNEL);
+	soc_dev_attr->soc_id = kstrdup_const(soc_id, GFP_KERNEL);
 	if (eshi)
 		soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u", eshi,
 						   eslo);
-- 
2.25.1



  reply	other threads:[~2022-07-15  7:22 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-15  7:22 [PATCH 5.10.y-cip 00/24] RZ/G2L Fixes from mainline Biju Das
2022-07-15  7:22 ` Biju Das [this message]
2022-07-25 21:04   ` [PATCH 5.10.y-cip 01/24] soc: renesas: Consolidate product register handling Pavel Machek
2022-07-26  9:16     ` Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 02/24] dt-bindings: power: renesas,rzg2l-sysc: Document RZ/V2L SoC Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 03/24] soc: renesas: Identify " Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 04/24] soc: renesas: Add support for reading product revision for RZ/G2L family Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 05/24] soc: renesas: Kconfig: Explicitly select PM and PM_GENERIC_DOMAINS configs Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 06/24] soc: renesas: Kconfig: Introduce ARCH_RZG2L config option Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 07/24] ASoC: sh: Make SND_SOC_RZ depend on ARCH_RZG2L Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 08/24] iio: adc: Kconfig: Make RZG2L_ADC " Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 09/24] dt-bindings: dma: rz-dmac: Document RZ/V2L SoC Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 10/24] dmaengine: sh: Kconfig: Add ARCH_R9A07G054 dependency for RZ_DMAC config option Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 11/24] dmaengine: sh: Kconfig: Make RZ_DMAC depend on ARCH_RZG2L Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 12/24] reset: Kconfig: Make RESET_RZG2L_USBPHY_CTRL " Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 13/24] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Add description for power-source property Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 14/24] ASoC: sh: rz-ssi: Drop SSIFSR_TDC and SSIFSR_RDC macros Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 15/24] ASoC: sh: rz-ssi: Propagate error codes returned from platform_get_irq_byname() Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 16/24] ASoC: sh: rz-ssi: Release the DMA channels in rz_ssi_probe() error path Biju Das
2022-07-25 21:00   ` Pavel Machek
2022-07-26  9:26     ` [cip-dev] " Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 17/24] iio: adc: rzg2l_adc: Remove unnecessary print function dev_err() Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 18/24] iio: adc: rzg2l_adc: Fix typo Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 19/24] iio: adc: rzg2l_adc: add missing fwnode_handle_put() in rzg2l_adc_parse_properties() Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 20/24] reset: renesas: Fix Runtime PM usage Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 21/24] reset: renesas: Check return value of reset_control_deassert() Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 22/24] i2c: riic: Simplify reset handling Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 23/24] arm64: dts: renesas: Fix pin controller node names Biju Das
2022-07-15  7:22 ` [PATCH 5.10.y-cip 24/24] arm64: dts: renesas: rzg2l-smarc: Move pinctrl definitions Biju Das
2022-07-25 20:53   ` [cip-dev] " Pavel Machek
2022-07-26  9:20     ` Biju Das
2022-07-26 11:51       ` Pavel Machek
2022-07-26 12:12         ` Biju Das
2022-07-25 21:05 ` [PATCH 5.10.y-cip 00/24] RZ/G2L Fixes from mainline Pavel Machek
2022-07-26  8:49 ` nobuhiro1.iwamatsu
2022-07-26 11:50   ` Pavel Machek

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