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From: Tianfei Zhang <tianfei.zhang@intel.com>
To: mdf@kernel.org, yilun.xu@intel.com, linux-fpga@vger.kernel.org,
	lee.jones@linaro.org, russell.h.weight@intel.com
Cc: hao.wu@intel.com, trix@redhat.com,
	Tianfei Zhang <tianfei.zhang@intel.com>
Subject: [PATCH v2 1/3] mfd: intel-m10-bmc: add m10bmc_sys_update_bits API
Date: Mon, 25 Jul 2022 05:28:34 -0400	[thread overview]
Message-ID: <20220725092836.647028-2-tianfei.zhang@intel.com> (raw)
In-Reply-To: <20220725092836.647028-1-tianfei.zhang@intel.com>

Adds register access helper functions for M10BMC.
m10bmc_raw_update_bits() uses to update m10bmc register
bits per addr.
m10bmc_sys_update_bits() uses to update m10bmc system
register bits per offset.

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
---
 include/linux/mfd/intel-m10-bmc.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index f0044b14136e..8e434886a5a1 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -133,6 +133,8 @@ struct intel_m10bmc {
  *
  * m10bmc_raw_read - read m10bmc register per addr
  * m10bmc_sys_read - read m10bmc system register per offset
+ * m10bmc_raw_update_bits - update m10bmc register bits per addr
+ * m10bmc_sys_update_bits - update m10bmc system register bits per offset
  */
 static inline int
 m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
@@ -148,6 +150,20 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
 	return ret;
 }
 
+static inline int
+m10bmc_raw_update_bits(struct intel_m10bmc *m10bmc, unsigned int addr,
+		       unsigned int msk, unsigned int val)
+{
+	int ret;
+
+	ret = regmap_update_bits(m10bmc->regmap, addr, msk, val);
+	if (ret)
+		dev_err(m10bmc->dev, "fail to update reg bits %x: %d\n",
+			addr, ret);
+
+	return ret;
+}
+
 /*
  * The base of the system registers could be configured by HW developers, and
  * in HW SPEC, the base is not added to the addresses of the system registers.
@@ -158,5 +174,7 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
  */
 #define m10bmc_sys_read(m10bmc, offset, val) \
 	m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val)
+#define m10bmc_sys_update_bits(m10bmc, offset, msk, val) \
+	m10bmc_raw_update_bits(m10bmc, M10BMC_SYS_BASE + (offset), msk, val)
 
 #endif /* __MFD_INTEL_M10_BMC_H */
-- 
2.26.2


  reply	other threads:[~2022-07-25  9:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-25  9:28 [PATCH v2 0/3] add Intel FPGA image reload support Tianfei Zhang
2022-07-25  9:28 ` Tianfei Zhang [this message]
2022-08-01 14:48   ` [PATCH v2 1/3] mfd: intel-m10-bmc: add m10bmc_sys_update_bits API Lee Jones
2022-07-25  9:28 ` [PATCH v2 2/3] fpga: m10bmc-sec: add sysfs to reload FPGA/BMC images Tianfei Zhang
2022-07-25  9:28 ` [PATCH v2 3/3] fpga: m10bmc-sec: add m10bmc_sec_retimer_load callback Tianfei Zhang

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