From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, peter.maydell@linaro.org,
gaosong@loongson.cn, f4bug@amsat.org, alex.bennee@linaro.org,
yangxiaojuan@loongson.cn
Subject: [PATCH for-7.1 4/5] target/loongarch: Update loongarch-fpu.xml
Date: Thu, 4 Aug 2022 21:02:12 +0800 [thread overview]
Message-ID: <20220804130213.1364164-5-gaosong@loongson.cn> (raw)
In-Reply-To: <20220804130213.1364164-1-gaosong@loongson.cn>
Rename loongarch-fpu64.xml to loongarch-fpu.xml and update loongarch-fpu.xml to match upstream GDB [1]
[1]:https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/fpu.xml
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
configs/targets/loongarch64-softmmu.mak | 2 +-
gdb-xml/loongarch-fpu.xml | 50 ++++++++++++++++++++++
gdb-xml/loongarch-fpu64.xml | 57 -------------------------
target/loongarch/gdbstub.c | 2 +-
4 files changed, 52 insertions(+), 59 deletions(-)
create mode 100644 gdb-xml/loongarch-fpu.xml
delete mode 100644 gdb-xml/loongarch-fpu64.xml
diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loongarch64-softmmu.mak
index 483474ba93..9abc99056f 100644
--- a/configs/targets/loongarch64-softmmu.mak
+++ b/configs/targets/loongarch64-softmmu.mak
@@ -1,5 +1,5 @@
TARGET_ARCH=loongarch64
TARGET_BASE_ARCH=loongarch
TARGET_SUPPORTS_MTTCG=y
-TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu64.xml
+TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
TARGET_NEED_FDT=y
diff --git a/gdb-xml/loongarch-fpu.xml b/gdb-xml/loongarch-fpu.xml
new file mode 100644
index 0000000000..a61057ec44
--- /dev/null
+++ b/gdb-xml/loongarch-fpu.xml
@@ -0,0 +1,50 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2021 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.loongarch.fpu">
+
+ <union id="fputype">
+ <field name="f" type="ieee_single"/>
+ <field name="d" type="ieee_double"/>
+ </union>
+
+ <reg name="f0" bitsize="64" type="fputype" group="float"/>
+ <reg name="f1" bitsize="64" type="fputype" group="float"/>
+ <reg name="f2" bitsize="64" type="fputype" group="float"/>
+ <reg name="f3" bitsize="64" type="fputype" group="float"/>
+ <reg name="f4" bitsize="64" type="fputype" group="float"/>
+ <reg name="f5" bitsize="64" type="fputype" group="float"/>
+ <reg name="f6" bitsize="64" type="fputype" group="float"/>
+ <reg name="f7" bitsize="64" type="fputype" group="float"/>
+ <reg name="f8" bitsize="64" type="fputype" group="float"/>
+ <reg name="f9" bitsize="64" type="fputype" group="float"/>
+ <reg name="f10" bitsize="64" type="fputype" group="float"/>
+ <reg name="f11" bitsize="64" type="fputype" group="float"/>
+ <reg name="f12" bitsize="64" type="fputype" group="float"/>
+ <reg name="f13" bitsize="64" type="fputype" group="float"/>
+ <reg name="f14" bitsize="64" type="fputype" group="float"/>
+ <reg name="f15" bitsize="64" type="fputype" group="float"/>
+ <reg name="f16" bitsize="64" type="fputype" group="float"/>
+ <reg name="f17" bitsize="64" type="fputype" group="float"/>
+ <reg name="f18" bitsize="64" type="fputype" group="float"/>
+ <reg name="f19" bitsize="64" type="fputype" group="float"/>
+ <reg name="f20" bitsize="64" type="fputype" group="float"/>
+ <reg name="f21" bitsize="64" type="fputype" group="float"/>
+ <reg name="f22" bitsize="64" type="fputype" group="float"/>
+ <reg name="f23" bitsize="64" type="fputype" group="float"/>
+ <reg name="f24" bitsize="64" type="fputype" group="float"/>
+ <reg name="f25" bitsize="64" type="fputype" group="float"/>
+ <reg name="f26" bitsize="64" type="fputype" group="float"/>
+ <reg name="f27" bitsize="64" type="fputype" group="float"/>
+ <reg name="f28" bitsize="64" type="fputype" group="float"/>
+ <reg name="f29" bitsize="64" type="fputype" group="float"/>
+ <reg name="f30" bitsize="64" type="fputype" group="float"/>
+ <reg name="f31" bitsize="64" type="fputype" group="float"/>
+ <reg name="fcc" bitsize="64" type="fputype" group="float"/>
+ <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
+</feature>
diff --git a/gdb-xml/loongarch-fpu64.xml b/gdb-xml/loongarch-fpu64.xml
deleted file mode 100644
index e52cf89fbc..0000000000
--- a/gdb-xml/loongarch-fpu64.xml
+++ /dev/null
@@ -1,57 +0,0 @@
-<?xml version="1.0"?>
-<!-- Copyright (C) 2021 Free Software Foundation, Inc.
-
- Copying and distribution of this file, with or without modification,
- are permitted in any medium without royalty provided the copyright
- notice and this notice are preserved. -->
-
-<!DOCTYPE feature SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.loongarch.fpu">
-
- <union id="fpu64type">
- <field name="f" type="ieee_single"/>
- <field name="d" type="ieee_double"/>
- </union>
-
- <reg name="f0" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f1" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f2" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f3" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f4" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f5" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f6" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f7" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f8" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f9" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f10" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f11" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f12" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f13" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f14" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f15" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f16" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f17" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f18" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f19" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f20" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f21" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f22" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f23" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f24" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f25" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f26" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f27" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f28" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f29" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f30" bitsize="64" type="fpu64type" group="float"/>
- <reg name="f31" bitsize="64" type="fpu64type" group="float"/>
- <reg name="fcc0" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc1" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc2" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc3" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc4" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc5" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc6" bitsize="8" type="uint8" group="float"/>
- <reg name="fcc7" bitsize="8" type="uint8" group="float"/>
- <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
-</feature>
diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c
index e643eca2d5..7d95b4b11c 100644
--- a/target/loongarch/gdbstub.c
+++ b/target/loongarch/gdbstub.c
@@ -80,5 +80,5 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env,
void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs)
{
gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,
- 41, "loongarch-fpu64.xml", 0);
+ 41, "loongarch-fpu.xml", 0);
}
--
2.31.1
next prev parent reply other threads:[~2022-08-04 13:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-04 13:02 [PATCH for-7.1 0/5] Fix gdb bugs and update gdb-xml Song Gao
2022-08-04 13:02 ` [PATCH for-7.1 1/5] target/loongarch: Fix GDB get the wrong pc Song Gao
2022-08-04 15:56 ` Richard Henderson
2022-08-04 13:02 ` [PATCH for-7.1 2/5] target/loongarch: add gdb_arch_name() Song Gao
2022-08-04 16:02 ` Richard Henderson
2022-08-04 13:02 ` [PATCH for-7.1 3/5] target/loongarch: update loongarch-base64.xml Song Gao
2022-08-04 16:03 ` Richard Henderson
2022-08-04 13:02 ` Song Gao [this message]
2022-08-04 16:06 ` [PATCH for-7.1 4/5] target/loongarch: Update loongarch-fpu.xml Richard Henderson
2022-08-04 13:02 ` [PATCH for-7.1 5/5] target/loongarch: Update gdb_set_fpu() and gdb_get_fpu() Song Gao
2022-08-04 16:08 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220804130213.1364164-5-gaosong@loongson.cn \
--to=gaosong@loongson.cn \
--cc=alex.bennee@linaro.org \
--cc=f4bug@amsat.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=yangxiaojuan@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.