From: Ricardo Koller <ricarkol@google.com> To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, andrew.jones@linux.dev Cc: maz@kernel.org, alexandru.elisei@arm.com, eric.auger@redhat.com, oliver.upton@linux.dev, reijiw@google.com, Ricardo Koller <ricarkol@google.com> Subject: [kvm-unit-tests PATCH v4 3/4] arm: pmu: Reset the pmu registers before starting some tests Date: Thu, 11 Aug 2022 11:52:09 -0700 [thread overview] Message-ID: <20220811185210.234711-4-ricarkol@google.com> (raw) In-Reply-To: <20220811185210.234711-1-ricarkol@google.com> Some registers like the PMOVS reset to an architecturally UNKNOWN value. Most tests expect them to be reset (mostly zeroed) using pmu_reset(). Add a pmu_reset() on all the tests that need one. As a bonus, fix a couple of comments related to the register state before a sub-test. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Ricardo Koller <ricarkol@google.com> --- arm/pmu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arm/pmu.c b/arm/pmu.c index a5260178..756e0d26 100644 --- a/arm/pmu.c +++ b/arm/pmu.c @@ -842,7 +842,7 @@ static void test_overflow_interrupt(void) write_regn_el0(pmevcntr, 1, PRE_OVERFLOW); isb(); - /* interrupts are disabled */ + /* interrupts are disabled (PMINTENSET_EL1 == 0) */ mem_access_loop(addr, 200, pmu.pmcr_ro | PMU_PMCR_E); report(expect_interrupts(0), "no overflow interrupt after preset"); @@ -858,7 +858,7 @@ static void test_overflow_interrupt(void) isb(); report(expect_interrupts(0), "no overflow interrupt after counting"); - /* enable interrupts */ + /* enable interrupts (PMINTENSET_EL1 <= ALL_SET) */ pmu_reset_stats(); @@ -906,6 +906,7 @@ static bool check_cycles_increase(void) bool success = true; /* init before event access, this test only cares about cycle count */ + pmu_reset(); set_pmcntenset(1 << PMU_CYCLE_IDX); set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */ @@ -960,6 +961,7 @@ static bool check_cpi(int cpi) uint32_t pmcr = get_pmcr() | PMU_PMCR_LC | PMU_PMCR_C | PMU_PMCR_E; /* init before event access, this test only cares about cycle count */ + pmu_reset(); set_pmcntenset(1 << PMU_CYCLE_IDX); set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */ -- 2.37.1.559.g78731f0fdb-goog
WARNING: multiple messages have this Message-ID (diff)
From: Ricardo Koller <ricarkol@google.com> To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, andrew.jones@linux.dev Cc: maz@kernel.org Subject: [kvm-unit-tests PATCH v4 3/4] arm: pmu: Reset the pmu registers before starting some tests Date: Thu, 11 Aug 2022 11:52:09 -0700 [thread overview] Message-ID: <20220811185210.234711-4-ricarkol@google.com> (raw) In-Reply-To: <20220811185210.234711-1-ricarkol@google.com> Some registers like the PMOVS reset to an architecturally UNKNOWN value. Most tests expect them to be reset (mostly zeroed) using pmu_reset(). Add a pmu_reset() on all the tests that need one. As a bonus, fix a couple of comments related to the register state before a sub-test. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Ricardo Koller <ricarkol@google.com> --- arm/pmu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arm/pmu.c b/arm/pmu.c index a5260178..756e0d26 100644 --- a/arm/pmu.c +++ b/arm/pmu.c @@ -842,7 +842,7 @@ static void test_overflow_interrupt(void) write_regn_el0(pmevcntr, 1, PRE_OVERFLOW); isb(); - /* interrupts are disabled */ + /* interrupts are disabled (PMINTENSET_EL1 == 0) */ mem_access_loop(addr, 200, pmu.pmcr_ro | PMU_PMCR_E); report(expect_interrupts(0), "no overflow interrupt after preset"); @@ -858,7 +858,7 @@ static void test_overflow_interrupt(void) isb(); report(expect_interrupts(0), "no overflow interrupt after counting"); - /* enable interrupts */ + /* enable interrupts (PMINTENSET_EL1 <= ALL_SET) */ pmu_reset_stats(); @@ -906,6 +906,7 @@ static bool check_cycles_increase(void) bool success = true; /* init before event access, this test only cares about cycle count */ + pmu_reset(); set_pmcntenset(1 << PMU_CYCLE_IDX); set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */ @@ -960,6 +961,7 @@ static bool check_cpi(int cpi) uint32_t pmcr = get_pmcr() | PMU_PMCR_LC | PMU_PMCR_C | PMU_PMCR_E; /* init before event access, this test only cares about cycle count */ + pmu_reset(); set_pmcntenset(1 << PMU_CYCLE_IDX); set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */ -- 2.37.1.559.g78731f0fdb-goog _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2022-08-11 18:52 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-11 18:52 [kvm-unit-tests PATCH v4 0/4] arm: pmu: Fixes for bare metal Ricardo Koller 2022-08-11 18:52 ` Ricardo Koller 2022-08-11 18:52 ` [kvm-unit-tests PATCH v4 1/4] arm: pmu: Add missing isb()'s after sys register writing Ricardo Koller 2022-08-11 18:52 ` Ricardo Koller 2022-08-11 18:52 ` [kvm-unit-tests PATCH v4 2/4] arm: pmu: Add reset_pmu() for 32-bit arm Ricardo Koller 2022-08-11 18:52 ` Ricardo Koller 2022-08-11 18:52 ` Ricardo Koller [this message] 2022-08-11 18:52 ` [kvm-unit-tests PATCH v4 3/4] arm: pmu: Reset the pmu registers before starting some tests Ricardo Koller 2022-08-11 18:52 ` [kvm-unit-tests PATCH v4 4/4] arm: pmu: Check for overflow in the low counter in chained counters tests Ricardo Koller 2022-08-11 18:52 ` Ricardo Koller 2022-08-12 6:33 ` [kvm-unit-tests PATCH v4 0/4] arm: pmu: Fixes for bare metal Andrew Jones 2022-08-12 6:33 ` Andrew Jones 2022-08-12 17:57 ` Ricardo Koller 2022-08-12 17:57 ` Ricardo Koller 2022-08-13 8:13 ` Marc Zyngier 2022-08-13 8:13 ` Marc Zyngier 2022-10-28 11:40 ` Andrew Jones 2022-10-28 11:40 ` Andrew Jones 2022-10-28 15:01 ` Marc Zyngier 2022-10-28 15:01 ` Marc Zyngier 2022-10-28 15:31 ` Andrew Jones 2022-10-28 15:31 ` Andrew Jones
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