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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>,
	linux-spi@vger.kernel.org
Subject: [PATCH] spi: intel: 64k erase is supported from Canon Lake and beyond
Date: Tue, 16 Aug 2022 15:55:37 +0300	[thread overview]
Message-ID: <20220816125537.89389-1-mika.westerberg@linux.intel.com> (raw)

The hardware sequencer in Intel Canon Lake and beyond supports also 64k
erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery
Parameter) to figure out what the chip actually supports and only issues
64k erase if it is supported.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/spi/spi-intel.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c
index 66063687ae27..c020b276e238 100644
--- a/drivers/spi/spi-intel.c
+++ b/drivers/spi/spi-intel.c
@@ -1073,6 +1073,7 @@ static int intel_spi_init(struct intel_spi *ispi)
 		ispi->pregs = ispi->base + CNL_PR;
 		ispi->nregions = CNL_FREG_NUM;
 		ispi->pr_num = CNL_PR_NUM;
+		erase_64k = true;
 		break;
 
 	default:
-- 
2.35.1


             reply	other threads:[~2022-08-16 12:56 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-16 12:55 Mika Westerberg [this message]
2022-08-22 15:42 ` [PATCH] spi: intel: 64k erase is supported from Canon Lake and beyond Mark Brown

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