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From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: netdev@vger.kernel.org
Cc: "Woojung Huh" <woojung.huh@microchip.com>,
	UNGLinuxDriver@microchip.com, "Andrew Lunn" <andrew@lunn.ch>,
	"Vivien Didelot" <vivien.didelot@gmail.com>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"Vladimir Oltean" <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Michael Grzeschik" <m.grzeschik@pengutronix.de>,
	"Oleksij Rempel" <linux@rempel-privat.de>,
	"Thorsten Leemhuis" <regressions@leemhuis.info>,
	"Alvin Šipraga" <alsi@bang-olufsen.dk>,
	"Rasmus Villemoes" <linux@rasmusvillemoes.dk>,
	"Craig McQueen" <craig@mcqueen.id.au>
Subject: [PATCH net] net: dsa: microchip: keep compatibility with device tree blobs with no phy-mode
Date: Thu, 18 Aug 2022 17:32:50 +0300	[thread overview]
Message-ID: <20220818143250.2797111-1-vladimir.oltean@nxp.com> (raw)

DSA has multiple ways of specifying a MAC connection to an internal PHY.
One requires a DT description like this:

	port@0 {
		reg = <0>;
		phy-handle = <&internal_phy>;
		phy-mode = "internal";
	};

(which is IMO the recommended approach, as it is the clearest
description)

but it is also possible to leave the specification as just:

	port@0 {
		reg = <0>;
	}

and if the driver implements ds->ops->phy_read and ds->ops->phy_write,
the DSA framework "knows" it should create a ds->slave_mii_bus, and it
should connect to a non-OF-based internal PHY on this MDIO bus, at an
MDIO address equal to the port address.

There is also an intermediary way of describing things:

	port@0 {
		reg = <0>;
		phy-handle = <&internal_phy>;
	};

In case 2, DSA calls phylink_connect_phy() and in case 3, it calls
phylink_of_phy_connect(). In both cases, phylink_create() has been
called with a phy_interface_t of PHY_INTERFACE_MODE_NA, and in both
cases, PHY_INTERFACE_MODE_NA is translated into phy->interface.

It is important to note that phy_device_create() initializes
dev->interface = PHY_INTERFACE_MODE_GMII, and so, when we use
phylink_create(PHY_INTERFACE_MODE_NA), no one will override this, and we
will end up with a PHY_INTERFACE_MODE_GMII interface inherited from the
PHY.

All this means that in order to maintain compatibility with device tree
blobs where the phy-mode property is missing, we need to allow the
"gmii" phy-mode and treat it as "internal".

Fixes: 2c709e0bdad4 ("net: dsa: microchip: ksz8795: add phylink support")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216320
Reported-by: Craig McQueen <craig@mcqueen.id.au>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 drivers/net/dsa/microchip/ksz_common.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index ed7d137cba99..7461272a6d41 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -803,9 +803,15 @@ static void ksz_phylink_get_caps(struct dsa_switch *ds, int port,
 	if (dev->info->supports_rgmii[port])
 		phy_interface_set_rgmii(config->supported_interfaces);
 
-	if (dev->info->internal_phy[port])
+	if (dev->info->internal_phy[port]) {
 		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
 			  config->supported_interfaces);
+		/* Compatibility for phylib's default interface type when the
+		 * phy-mode property is absent
+		 */
+		__set_bit(PHY_INTERFACE_MODE_GMII,
+			  config->supported_interfaces);
+	}
 
 	if (dev->dev_ops->get_caps)
 		dev->dev_ops->get_caps(dev, port, config);
-- 
2.34.1


             reply	other threads:[~2022-08-18 14:33 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 14:32 Vladimir Oltean [this message]
2022-08-18 15:06 ` [PATCH net] net: dsa: microchip: keep compatibility with device tree blobs with no phy-mode Alvin Šipraga
2022-08-18 15:18   ` Vladimir Oltean
2022-08-18 15:25     ` Alvin Šipraga
2022-08-18 15:13 ` Andrew Lunn
2022-08-18 15:21   ` Vladimir Oltean
2022-08-18 15:33   ` Russell King (Oracle)
2022-08-19 10:19 ` Rasmus Villemoes
2022-08-19 10:57   ` Vladimir Oltean
2022-08-19 11:47     ` Rasmus Villemoes
2022-08-19 16:41       ` Vladimir Oltean
2022-08-22 20:11         ` Tim Harvey
2022-08-19 23:32 ` Jakub Kicinski
2022-08-20 11:24   ` Vladimir Oltean
2022-08-23  1:00 ` patchwork-bot+netdevbpf

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