From: Conor Dooley <conor.dooley@microchip.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com>, Conor Dooley <conor.dooley@microchip.com>, Daire McNamara <daire.mcnamara@microchip.com> Cc: Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org> Subject: [PATCH 5/6] dt-bindings: riscv: microchip: document icicle reference design Date: Fri, 19 Aug 2022 13:22:59 +0100 [thread overview] Message-ID: <20220819122259.183600-6-conor.dooley@microchip.com> (raw) In-Reply-To: <20220819122259.183600-1-conor.dooley@microchip.com> Add a new compatible for the icicle kit reference design's 22.09 release, which made some changes to the memory map - including adding the ability to read the CCCs via the system controller bus. Technically that was always possible, but the specific CC chosen could vary per run of the synthesis tool. Hopefully this is the last reference design version impacting the memory map. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- Documentation/devicetree/bindings/riscv/microchip.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 1aa7336a9672..928ce4d4e087 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -21,6 +21,7 @@ properties: - enum: - microchip,mpfs-icicle-kit - microchip,mpfs-icicle-reference-rtlv2203 + - microchip,mpfs-icicle-reference-rtlv2209 - sundance,polarberry - const: microchip,mpfs -- 2.36.1
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com>, Conor Dooley <conor.dooley@microchip.com>, Daire McNamara <daire.mcnamara@microchip.com> Cc: Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org> Subject: [PATCH 5/6] dt-bindings: riscv: microchip: document icicle reference design Date: Fri, 19 Aug 2022 13:22:59 +0100 [thread overview] Message-ID: <20220819122259.183600-6-conor.dooley@microchip.com> (raw) In-Reply-To: <20220819122259.183600-1-conor.dooley@microchip.com> Add a new compatible for the icicle kit reference design's 22.09 release, which made some changes to the memory map - including adding the ability to read the CCCs via the system controller bus. Technically that was always possible, but the specific CC chosen could vary per run of the synthesis tool. Hopefully this is the last reference design version impacting the memory map. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- Documentation/devicetree/bindings/riscv/microchip.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 1aa7336a9672..928ce4d4e087 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -21,6 +21,7 @@ properties: - enum: - microchip,mpfs-icicle-kit - microchip,mpfs-icicle-reference-rtlv2203 + - microchip,mpfs-icicle-reference-rtlv2209 - sundance,polarberry - const: microchip,mpfs -- 2.36.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-08-19 12:28 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-19 12:22 [PATCH 0/6] Add PolarFire SoC Fabric Clock Conditioning Circuitry Support Conor Dooley 2022-08-19 12:22 ` Conor Dooley 2022-08-19 12:22 ` [PATCH 1/6] dt-bindings: clk: rename mpfs-clkcfg binding Conor Dooley 2022-08-19 12:22 ` Conor Dooley 2022-08-19 12:44 ` Krzysztof Kozlowski 2022-08-19 12:44 ` Krzysztof Kozlowski 2022-08-19 12:22 ` [PATCH 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks Conor Dooley 2022-08-19 12:22 ` Conor Dooley 2022-08-19 12:45 ` Krzysztof Kozlowski 2022-08-19 12:45 ` Krzysztof Kozlowski 2022-08-19 13:20 ` Conor.Dooley 2022-08-19 13:20 ` Conor.Dooley 2022-08-19 12:22 ` [PATCH 3/6] dt-bindings: clk: add PolarFire SoC fabric clock ids Conor Dooley 2022-08-19 12:22 ` Conor Dooley 2022-08-19 12:45 ` Krzysztof Kozlowski 2022-08-19 12:45 ` Krzysztof Kozlowski 2022-08-19 12:22 ` [PATCH 4/6] clk: microchip: add PolarFire SoC fabric clock support Conor Dooley 2022-08-19 12:22 ` Conor Dooley 2022-08-19 12:22 ` Conor Dooley [this message] 2022-08-19 12:22 ` [PATCH 5/6] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley 2022-08-19 12:46 ` Krzysztof Kozlowski 2022-08-19 12:46 ` Krzysztof Kozlowski 2022-08-19 12:23 ` [PATCH 6/6] riscv: dts: microchip: add the mpfs' fabric clock control Conor Dooley 2022-08-19 12:23 ` Conor Dooley 2022-08-19 12:47 ` Krzysztof Kozlowski 2022-08-19 12:47 ` Krzysztof Kozlowski 2022-08-19 13:15 ` Conor.Dooley 2022-08-19 13:15 ` Conor.Dooley 2022-08-19 13:28 ` Krzysztof Kozlowski 2022-08-19 13:28 ` Krzysztof Kozlowski 2022-08-19 13:48 ` Conor.Dooley 2022-08-19 13:48 ` Conor.Dooley 2022-08-19 14:06 ` Krzysztof Kozlowski 2022-08-19 14:06 ` Krzysztof Kozlowski 2022-08-19 14:14 ` Conor.Dooley 2022-08-19 14:14 ` Conor.Dooley 2022-08-19 14:22 ` Krzysztof Kozlowski 2022-08-19 14:22 ` Krzysztof Kozlowski 2022-08-19 14:32 ` Conor.Dooley 2022-08-19 14:32 ` Conor.Dooley 2022-08-19 14:35 ` Krzysztof Kozlowski 2022-08-19 14:35 ` Krzysztof Kozlowski
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