From: Li Yang <leoyang.li@nxp.com>
To: shawnguo@kernel.org, devicetree@vger.kernel.org
Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Li Yang <leoyang.li@nxp.com>,
Laurentiu Tudor <laurentiu.tudor@nxp.com>
Subject: [PATCH 07/11] arm64: dts: ls1043a: make dma-coherent global to the SoC
Date: Wed, 24 Aug 2022 17:36:58 -0500 [thread overview]
Message-ID: <20220824223700.32442-8-leoyang.li@nxp.com> (raw)
In-Reply-To: <20220824223700.32442-1-leoyang.li@nxp.com>
ls1043a is really completely dma coherent in their entirety so add the
dma-coherent property at the soc level in the device tree and drop the
instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index adaf337c438c..b37244acf16a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -301,6 +301,7 @@ soc: soc {
#size-cells = <2>;
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+ dma-coherent;
clockgen: clocking@1ee1000 {
compatible = "fsl,ls1043a-clockgen";
@@ -890,7 +891,6 @@ pcie1: pcie@3400000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
@@ -918,7 +918,6 @@ pcie2: pcie@3500000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
@@ -946,7 +945,6 @@ pcie3: pcie@3600000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
--
2.37.1
WARNING: multiple messages have this Message-ID (diff)
From: Li Yang <leoyang.li@nxp.com>
To: shawnguo@kernel.org, devicetree@vger.kernel.org
Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Li Yang <leoyang.li@nxp.com>,
Laurentiu Tudor <laurentiu.tudor@nxp.com>
Subject: [PATCH 07/11] arm64: dts: ls1043a: make dma-coherent global to the SoC
Date: Wed, 24 Aug 2022 17:36:58 -0500 [thread overview]
Message-ID: <20220824223700.32442-8-leoyang.li@nxp.com> (raw)
In-Reply-To: <20220824223700.32442-1-leoyang.li@nxp.com>
ls1043a is really completely dma coherent in their entirety so add the
dma-coherent property at the soc level in the device tree and drop the
instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index adaf337c438c..b37244acf16a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -301,6 +301,7 @@ soc: soc {
#size-cells = <2>;
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+ dma-coherent;
clockgen: clocking@1ee1000 {
compatible = "fsl,ls1043a-clockgen";
@@ -890,7 +891,6 @@ pcie1: pcie@3400000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
@@ -918,7 +918,6 @@ pcie2: pcie@3500000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
@@ -946,7 +945,6 @@ pcie3: pcie@3600000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
--
2.37.1
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next prev parent reply other threads:[~2022-08-24 22:37 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-24 22:36 [PATCH 00/11] accumulated dts updates for ls1043a Li Yang
2022-08-24 22:36 ` Li Yang
2022-08-24 22:36 ` [PATCH 01/11] arm64: dts: ls1043a: fix the wrong size of dcfg space Li Yang
2022-08-24 22:36 ` Li Yang
2022-08-24 22:36 ` [PATCH 02/11] arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node Li Yang
2022-08-24 22:36 ` Li Yang
2022-08-24 22:36 ` [PATCH 03/11] arm64: dts: ls1043a: use pcie aer/pme interrupts Li Yang
2022-08-24 22:36 ` Li Yang
2022-09-05 1:05 ` Shawn Guo
2022-09-05 1:05 ` Shawn Guo
2022-08-24 22:36 ` [PATCH 04/11] arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes Li Yang
2022-08-24 22:36 ` Li Yang
2022-08-24 22:36 ` [PATCH 05/11] arm64: dts: ls1043a: Add big-endian property " Li Yang
2022-08-24 22:36 ` Li Yang
2022-08-24 22:36 ` [PATCH 06/11] arm64: dts: ls1043a: add missing dma ranges property Li Yang
2022-08-24 22:36 ` Li Yang
2022-08-24 22:36 ` Li Yang [this message]
2022-08-24 22:36 ` [PATCH 07/11] arm64: dts: ls1043a: make dma-coherent global to the SoC Li Yang
2022-08-24 22:36 ` [PATCH 08/11] arm64: dts: ls1043a: add gpio based i2c recovery information Li Yang
2022-08-24 22:36 ` Li Yang
2022-09-05 1:06 ` Shawn Guo
2022-09-05 1:06 ` Shawn Guo
2022-08-24 22:37 ` [PATCH 09/11] arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size Li Yang
2022-08-24 22:37 ` Li Yang
2022-09-05 1:09 ` Shawn Guo
2022-09-05 1:09 ` Shawn Guo
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