From: Ben Dooks <ben.dooks@sifive.com> To: zong.li@sifive.com, palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, greentime.hu@sifive.com, conor.dooley@microchip.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Ben Dooks <ben.dooks@sifive.com> Subject: [PATCH] soc: sifive: ccache: reduce printing on init Date: Tue, 30 Aug 2022 09:26:20 +0100 [thread overview] Message-ID: <20220830082620.1680602-1-ben.dooks@sifive.com> (raw) In-Reply-To: <20220829062202.3287-1-zong.li@sifive.com> The driver prints out 6 lines on startup, which can easily be redcued to two lines without losing any information. Note, to make the types work better, uint64_t has been replaced with ULL to make the unsigned long long match the format in the print statement. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> --- drivers/soc/sifive/sifive_ccache.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 46ce33db7d30..65a10a6ee211 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -76,20 +76,17 @@ static void setup_sifive_debug(void) static void ccache_config_read(void) { - u32 regval, val; - - regval = readl(ccache_base + SIFIVE_CCACHE_CONFIG); - val = regval & 0xFF; - pr_info("CCACHE: No. of Banks in the cache: %d\n", val); - val = (regval & 0xFF00) >> 8; - pr_info("CCACHE: No. of ways per bank: %d\n", val); - val = (regval & 0xFF0000) >> 16; - pr_info("CCACHE: Sets per bank: %llu\n", (uint64_t)1 << val); - val = (regval & 0xFF000000) >> 24; - pr_info("CCACHE: Bytes per cache block: %llu\n", (uint64_t)1 << val); - - regval = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); - pr_info("CCACHE: Index of the largest way enabled: %d\n", regval); + u32 cfg; + + cfg = readl(ccache_base + SIFIVE_CCACHE_CONFIG); + + pr_info("CCACHE: %u banks, %u ways, sets/bank=%llu, bytes/block=%llu\n", + (cfg & 0xff), (cfg >> 8) & 0xff, + 1ULL << ((cfg >> 16) & 0xff), + 1ULL << ((cfg >> 24) & 0xff)); + + cfg = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); + pr_info("CCACHE: Index of the largest way enabled: %d\n", cfg); } static const struct of_device_id sifive_ccache_ids[] = { -- 2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Ben Dooks <ben.dooks@sifive.com> To: zong.li@sifive.com, palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, greentime.hu@sifive.com, conor.dooley@microchip.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Ben Dooks <ben.dooks@sifive.com> Subject: [PATCH] soc: sifive: ccache: reduce printing on init Date: Tue, 30 Aug 2022 09:26:20 +0100 [thread overview] Message-ID: <20220830082620.1680602-1-ben.dooks@sifive.com> (raw) In-Reply-To: <20220829062202.3287-1-zong.li@sifive.com> The driver prints out 6 lines on startup, which can easily be redcued to two lines without losing any information. Note, to make the types work better, uint64_t has been replaced with ULL to make the unsigned long long match the format in the print statement. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> --- drivers/soc/sifive/sifive_ccache.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 46ce33db7d30..65a10a6ee211 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -76,20 +76,17 @@ static void setup_sifive_debug(void) static void ccache_config_read(void) { - u32 regval, val; - - regval = readl(ccache_base + SIFIVE_CCACHE_CONFIG); - val = regval & 0xFF; - pr_info("CCACHE: No. of Banks in the cache: %d\n", val); - val = (regval & 0xFF00) >> 8; - pr_info("CCACHE: No. of ways per bank: %d\n", val); - val = (regval & 0xFF0000) >> 16; - pr_info("CCACHE: Sets per bank: %llu\n", (uint64_t)1 << val); - val = (regval & 0xFF000000) >> 24; - pr_info("CCACHE: Bytes per cache block: %llu\n", (uint64_t)1 << val); - - regval = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); - pr_info("CCACHE: Index of the largest way enabled: %d\n", regval); + u32 cfg; + + cfg = readl(ccache_base + SIFIVE_CCACHE_CONFIG); + + pr_info("CCACHE: %u banks, %u ways, sets/bank=%llu, bytes/block=%llu\n", + (cfg & 0xff), (cfg >> 8) & 0xff, + 1ULL << ((cfg >> 16) & 0xff), + 1ULL << ((cfg >> 24) & 0xff)); + + cfg = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); + pr_info("CCACHE: Index of the largest way enabled: %d\n", cfg); } static const struct of_device_id sifive_ccache_ids[] = { -- 2.35.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-08-30 8:26 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-29 6:21 [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE Zong Li 2022-08-29 6:21 ` Zong Li 2022-08-29 6:22 ` [PATCH 1/3] dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache Zong Li 2022-08-29 6:22 ` Zong Li 2022-08-29 6:45 ` Conor.Dooley 2022-08-29 6:45 ` Conor.Dooley 2022-08-29 7:38 ` Zong Li 2022-08-29 7:38 ` Zong Li 2022-08-29 18:42 ` Rob Herring 2022-08-29 18:42 ` Rob Herring 2022-08-30 2:57 ` Zong Li 2022-08-30 2:57 ` Zong Li 2022-10-07 2:58 ` Palmer Dabbelt 2022-10-07 2:58 ` Palmer Dabbelt 2022-10-07 3:51 ` Zong Li 2022-10-07 3:51 ` Zong Li 2022-08-29 6:22 ` [PATCH 2/3] soc: sifive: l2 cache: Rename " Zong Li 2022-08-29 6:22 ` Zong Li 2022-08-29 7:05 ` Conor.Dooley 2022-08-29 7:05 ` Conor.Dooley 2022-08-29 8:40 ` Zong Li 2022-08-29 8:40 ` Zong Li 2022-08-30 8:41 ` Conor.Dooley 2022-08-30 8:41 ` Conor.Dooley 2022-08-31 5:31 ` Zong Li 2022-08-31 5:31 ` Zong Li 2022-08-30 8:18 ` Ben Dooks 2022-08-30 8:18 ` Ben Dooks 2022-08-29 6:22 ` [PATCH 3/3] EDAC/sifive: use sifive_ccache instead of sifive_l2 Zong Li 2022-08-29 6:22 ` Zong Li 2022-10-07 2:58 ` Palmer Dabbelt 2022-10-07 2:58 ` Palmer Dabbelt 2022-08-30 7:59 ` [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE Ben Dooks 2022-08-30 7:59 ` Ben Dooks 2022-08-31 8:23 ` Zong Li 2022-08-31 8:23 ` Zong Li 2022-08-30 8:26 ` Ben Dooks [this message] 2022-08-30 8:26 ` [PATCH] soc: sifive: ccache: reduce printing on init Ben Dooks 2022-08-30 16:30 ` Conor.Dooley 2022-08-30 16:30 ` Conor.Dooley 2022-08-30 17:03 ` Ben Dooks 2022-08-30 17:03 ` Ben Dooks 2022-08-31 5:22 ` Zong Li 2022-08-31 5:22 ` Zong Li 2022-08-31 15:55 ` Ben Dooks 2022-08-31 15:55 ` Ben Dooks 2022-09-01 8:34 ` Zong Li 2022-09-01 8:34 ` Zong Li 2022-08-30 8:36 ` [PATCH] dt-bindings: sifive-ccache: fix cache level for l3 cache Ben Dooks 2022-08-30 8:36 ` Ben Dooks 2022-08-30 12:47 ` Rob Herring 2022-08-30 12:47 ` Rob Herring 2022-08-30 12:51 ` [RESEND PATCH] " Ben Dooks 2022-08-30 12:51 ` Ben Dooks 2022-08-30 12:56 ` Conor.Dooley 2022-08-30 12:56 ` Conor.Dooley 2022-08-30 12:58 ` Ben Dooks 2022-08-30 12:58 ` Ben Dooks 2022-08-30 13:49 ` Conor.Dooley 2022-08-30 13:49 ` Conor.Dooley 2022-08-30 16:49 ` Ben Dooks 2022-08-30 16:49 ` Ben Dooks 2022-08-30 17:08 ` Conor.Dooley 2022-08-30 17:08 ` Conor.Dooley 2022-08-31 5:17 ` Zong Li 2022-08-31 5:17 ` Zong Li 2022-08-31 6:25 ` Conor.Dooley 2022-08-31 6:25 ` Conor.Dooley 2022-09-02 19:36 ` Rob Herring 2022-09-02 19:36 ` Rob Herring
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