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From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org
Cc: agross@kernel.org, linux-kernel@vger.kernel.org,
	robh+dt@kernel.org, thara.gopinath@gmail.com,
	devicetree@vger.kernel.org, robh@kernel.org,
	krzysztof.kozlowski@linaro.org, andersson@kernel.org,
	bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com,
	catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de
Subject: [PATCH v7 2/4] arm64: dts: qcom: sm8250: Add dt entries to support crypto engine.
Date: Wed, 21 Sep 2022 10:26:00 +0530	[thread overview]
Message-ID: <20220921045602.1462007-3-bhupesh.sharma@linaro.org> (raw)
In-Reply-To: <20220921045602.1462007-1-bhupesh.sharma@linaro.org>

Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8250.dtsi'.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index a5b62cadb129..7b3af34f8486 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2188,6 +2188,34 @@ ufs_mem_phy_lanes: phy@1d87400 {
 			};
 		};
 
+		cryptobam: dma-controller@1dc4000 {
+			compatible = "qcom,bam-v1.7.0";
+			reg = <0 0x01dc4000 0 0x24000>;
+			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			qcom,ee = <0>;
+			qcom,controlled-remotely;
+			iommus = <&apps_smmu 0x584 0x0011>,
+				 <&apps_smmu 0x586 0x0011>,
+				 <&apps_smmu 0x594 0x0011>,
+				 <&apps_smmu 0x596 0x0011>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+			interconnect-names = "memory";
+		};
+
+		crypto: crypto@1dfa000 {
+			compatible = "qcom,sm8250-qce";
+			reg = <0 0x01dfa000 0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x584 0x0011>,
+				 <&apps_smmu 0x586 0x0011>,
+				 <&apps_smmu 0x594 0x0011>,
+				 <&apps_smmu 0x596 0x0011>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+			interconnect-names = "memory";
+		};
+
 		ipa_virt: interconnect@1e00000 {
 			compatible = "qcom,sm8250-ipa-virt";
 			reg = <0 0x01e00000 0 0x1000>;
-- 
2.37.1


WARNING: multiple messages have this Message-ID (diff)
From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org
Cc: agross@kernel.org, linux-kernel@vger.kernel.org,
	robh+dt@kernel.org, thara.gopinath@gmail.com,
	devicetree@vger.kernel.org, robh@kernel.org,
	krzysztof.kozlowski@linaro.org, andersson@kernel.org,
	bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com,
	catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de
Subject: [PATCH v7 2/4] arm64: dts: qcom: sm8250: Add dt entries to support crypto engine.
Date: Wed, 21 Sep 2022 10:26:00 +0530	[thread overview]
Message-ID: <20220921045602.1462007-3-bhupesh.sharma@linaro.org> (raw)
In-Reply-To: <20220921045602.1462007-1-bhupesh.sharma@linaro.org>

Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8250.dtsi'.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index a5b62cadb129..7b3af34f8486 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2188,6 +2188,34 @@ ufs_mem_phy_lanes: phy@1d87400 {
 			};
 		};
 
+		cryptobam: dma-controller@1dc4000 {
+			compatible = "qcom,bam-v1.7.0";
+			reg = <0 0x01dc4000 0 0x24000>;
+			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			qcom,ee = <0>;
+			qcom,controlled-remotely;
+			iommus = <&apps_smmu 0x584 0x0011>,
+				 <&apps_smmu 0x586 0x0011>,
+				 <&apps_smmu 0x594 0x0011>,
+				 <&apps_smmu 0x596 0x0011>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+			interconnect-names = "memory";
+		};
+
+		crypto: crypto@1dfa000 {
+			compatible = "qcom,sm8250-qce";
+			reg = <0 0x01dfa000 0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x584 0x0011>,
+				 <&apps_smmu 0x586 0x0011>,
+				 <&apps_smmu 0x594 0x0011>,
+				 <&apps_smmu 0x596 0x0011>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+			interconnect-names = "memory";
+		};
+
 		ipa_virt: interconnect@1e00000 {
 			compatible = "qcom,sm8250-ipa-virt";
 			reg = <0 0x01e00000 0 0x1000>;
-- 
2.37.1


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  parent reply	other threads:[~2022-09-21  4:56 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-21  4:55 [PATCH v7 0/4] ARM: dts + defconfig: Add support for Qualcomm QCE block on new SoCs and in defconfig Bhupesh Sharma
2022-09-21  4:55 ` Bhupesh Sharma
2022-09-21  4:55 ` [PATCH v7 1/4] ARM: dts: qcom: Use new compatibles for crypto nodes Bhupesh Sharma
2022-09-21  4:55   ` Bhupesh Sharma
2022-09-21  4:56 ` Bhupesh Sharma [this message]
2022-09-21  4:56   ` [PATCH v7 2/4] arm64: dts: qcom: sm8250: Add dt entries to support crypto engine Bhupesh Sharma
2022-09-21  4:56 ` [PATCH v7 3/4] arm64: dts: qcom: sm8150: " Bhupesh Sharma
2022-09-21  4:56   ` Bhupesh Sharma
2022-09-21  4:56 ` [PATCH v7 4/4] arm64: defconfig: Enable Qualcomm QCE crypto Bhupesh Sharma
2022-09-21  4:56   ` Bhupesh Sharma
2022-09-21 19:20   ` Krzysztof Kozlowski
2022-09-21 19:20     ` Krzysztof Kozlowski
2022-11-07  3:11 ` (subset) [PATCH v7 0/4] ARM: dts + defconfig: Add support for Qualcomm QCE block on new SoCs and in defconfig Bjorn Andersson
2022-11-07  3:11   ` Bjorn Andersson

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