All of lore.kernel.org
 help / color / mirror / Atom feed
From: Anand Moon <linux.amoon@gmail.com>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: Anand Moon <linux.amoon@gmail.com>,
	Chukun Pan <amadeus@jmu.edu.cn>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
Date: Mon, 26 Sep 2022 06:14:18 +0000	[thread overview]
Message-ID: <20220926061420.1248-1-linux.amoon@gmail.com> (raw)

Add the nodes to enable the NVM Express PCIe controller on the
Radxa ROCK3 Model A board.

Cc: Chukun Pan <amadeus@jmu.edu.cn>
Cc: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
alarm@rock-3a:~$ lspci
0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
0002:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
0002:01:00.0 Non-Volatile memory controller: Micron/Crucial Technology P2 NVMe PCIe SSD (rev 01)
---
 .../boot/dts/rockchip/rk3568-rock-3a.dts      | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index fb87a168fe96..44d85ee1631e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -79,6 +79,26 @@ vcc3v3_pcie: vcc3v3-pcie-regulator {
 		vin-supply = <&vcc5v0_sys>;
 	};
 
+	/* pi6c pcie clock generator feeds both ports */
+	vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_pi6c_03";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <200000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	pcie30_3v3: gpio-regulator {
+		compatible = "regulator-gpio";
+		regulator-name = "pcie30_3v3";
+		regulator-min-microvolt = <100000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+		gpios-states = <0x1>;
+		states = <100000 0x0>, <3300000 0x1>;
+	};
+
 	vcc3v3_sys: vcc3v3-sys {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3_sys";
@@ -546,6 +566,22 @@ &pcie2x1 {
 	status = "okay";
 };
 
+&pcie30phy {
+	data-lanes = <0 1 2 3>;
+	phy-supply = <&vcc3v3_pi6c_03>;
+	status = "okay";
+};
+
+&pcie3x2 {
+	/* mPCIe slot */
+	num-lanes = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie30x2m1_pins>;
+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&pcie30_3v3>;
+	status = "okay";
+};
+
 &pinctrl {
 	cam {
 		vcc_cam_en: vcc_cam_en {
-- 
2.37.3


WARNING: multiple messages have this Message-ID (diff)
From: Anand Moon <linux.amoon@gmail.com>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: Anand Moon <linux.amoon@gmail.com>,
	Chukun Pan <amadeus@jmu.edu.cn>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
Date: Mon, 26 Sep 2022 06:14:18 +0000	[thread overview]
Message-ID: <20220926061420.1248-1-linux.amoon@gmail.com> (raw)

Add the nodes to enable the NVM Express PCIe controller on the
Radxa ROCK3 Model A board.

Cc: Chukun Pan <amadeus@jmu.edu.cn>
Cc: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
alarm@rock-3a:~$ lspci
0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
0002:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
0002:01:00.0 Non-Volatile memory controller: Micron/Crucial Technology P2 NVMe PCIe SSD (rev 01)
---
 .../boot/dts/rockchip/rk3568-rock-3a.dts      | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index fb87a168fe96..44d85ee1631e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -79,6 +79,26 @@ vcc3v3_pcie: vcc3v3-pcie-regulator {
 		vin-supply = <&vcc5v0_sys>;
 	};
 
+	/* pi6c pcie clock generator feeds both ports */
+	vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_pi6c_03";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <200000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	pcie30_3v3: gpio-regulator {
+		compatible = "regulator-gpio";
+		regulator-name = "pcie30_3v3";
+		regulator-min-microvolt = <100000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+		gpios-states = <0x1>;
+		states = <100000 0x0>, <3300000 0x1>;
+	};
+
 	vcc3v3_sys: vcc3v3-sys {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3_sys";
@@ -546,6 +566,22 @@ &pcie2x1 {
 	status = "okay";
 };
 
+&pcie30phy {
+	data-lanes = <0 1 2 3>;
+	phy-supply = <&vcc3v3_pi6c_03>;
+	status = "okay";
+};
+
+&pcie3x2 {
+	/* mPCIe slot */
+	num-lanes = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie30x2m1_pins>;
+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&pcie30_3v3>;
+	status = "okay";
+};
+
 &pinctrl {
 	cam {
 		vcc_cam_en: vcc_cam_en {
-- 
2.37.3


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Anand Moon <linux.amoon@gmail.com>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: Anand Moon <linux.amoon@gmail.com>,
	Chukun Pan <amadeus@jmu.edu.cn>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
Date: Mon, 26 Sep 2022 06:14:18 +0000	[thread overview]
Message-ID: <20220926061420.1248-1-linux.amoon@gmail.com> (raw)

Add the nodes to enable the NVM Express PCIe controller on the
Radxa ROCK3 Model A board.

Cc: Chukun Pan <amadeus@jmu.edu.cn>
Cc: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
alarm@rock-3a:~$ lspci
0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
0002:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3568 Remote Signal Processor (rev 01)
0002:01:00.0 Non-Volatile memory controller: Micron/Crucial Technology P2 NVMe PCIe SSD (rev 01)
---
 .../boot/dts/rockchip/rk3568-rock-3a.dts      | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index fb87a168fe96..44d85ee1631e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -79,6 +79,26 @@ vcc3v3_pcie: vcc3v3-pcie-regulator {
 		vin-supply = <&vcc5v0_sys>;
 	};
 
+	/* pi6c pcie clock generator feeds both ports */
+	vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_pi6c_03";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <200000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	pcie30_3v3: gpio-regulator {
+		compatible = "regulator-gpio";
+		regulator-name = "pcie30_3v3";
+		regulator-min-microvolt = <100000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+		gpios-states = <0x1>;
+		states = <100000 0x0>, <3300000 0x1>;
+	};
+
 	vcc3v3_sys: vcc3v3-sys {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3_sys";
@@ -546,6 +566,22 @@ &pcie2x1 {
 	status = "okay";
 };
 
+&pcie30phy {
+	data-lanes = <0 1 2 3>;
+	phy-supply = <&vcc3v3_pi6c_03>;
+	status = "okay";
+};
+
+&pcie3x2 {
+	/* mPCIe slot */
+	num-lanes = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie30x2m1_pins>;
+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&pcie30_3v3>;
+	status = "okay";
+};
+
 &pinctrl {
 	cam {
 		vcc_cam_en: vcc_cam_en {
-- 
2.37.3


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

             reply	other threads:[~2022-09-26  6:14 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-26  6:14 Anand Moon [this message]
2022-09-26  6:14 ` [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a Anand Moon
2022-09-26  6:14 ` Anand Moon
2022-09-26 18:00 ` Chukun Pan
2022-09-26 18:00   ` Chukun Pan
2022-09-26 18:00   ` Chukun Pan
2022-09-26 18:01   ` [PATCH 1/3] arm64: dts: rockchip: Add regulator suffix to rock-3a Chukun Pan
2022-09-26 18:01     ` Chukun Pan
2022-09-26 18:01     ` Chukun Pan
2022-09-27  5:42     ` Michael Riesch
2022-09-27  5:42       ` Michael Riesch
2022-09-27  5:42       ` Michael Riesch
2022-09-26 18:01   ` [PATCH 2/3] arm64: dts: rockchip: Rename pinctrl label of pcie2x1 on rock-3a Chukun Pan
2022-09-26 18:01     ` Chukun Pan
2022-09-26 18:01     ` Chukun Pan
2022-10-05  7:48     ` Heiko Stübner
2022-10-05  7:48       ` Heiko Stübner
2022-10-05  7:48       ` Heiko Stübner
2022-09-26 18:01   ` [PATCH 3/3] arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a Chukun Pan
2022-09-26 18:01     ` Chukun Pan
2022-09-26 18:01     ` Chukun Pan
2022-09-27 13:46   ` [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a Anand Moon
2022-09-27 13:46     ` Anand Moon
2022-09-27 13:46     ` Anand Moon
2022-09-27 17:47     ` Robin Murphy
2022-09-27 17:47       ` Robin Murphy
2022-09-27 17:47       ` Robin Murphy
2022-09-28 10:05       ` Chukun Pan
2022-09-28 10:05         ` Chukun Pan
2022-09-28 10:05         ` Chukun Pan
2022-09-28 10:37         ` Robin Murphy
2022-09-28 10:37           ` Robin Murphy
2022-09-28 10:37           ` Robin Murphy
2022-09-27 18:15     ` Chukun Pan
2022-09-27 18:15       ` Chukun Pan
2022-09-27 18:15       ` Chukun Pan
2022-09-27 18:15       ` [PATCH 3/3] arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a Chukun Pan
2022-09-27 18:15         ` Chukun Pan
2022-09-27 18:15         ` Chukun Pan
2022-09-28 11:04       ` [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a Anand Moon
2022-09-28 11:04         ` Anand Moon
2022-09-28 11:04         ` Anand Moon
2022-09-30 15:25         ` [PATCH 0/1] " Chukun Pan
2022-09-30 15:25           ` Chukun Pan
2022-09-30 15:25           ` Chukun Pan
2022-10-02 15:46           ` Anand Moon
2022-10-02 15:46             ` Anand Moon
2022-10-02 15:46             ` Anand Moon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220926061420.1248-1-linux.amoon@gmail.com \
    --to=linux.amoon@gmail.com \
    --cc=amadeus@jmu.edu.cn \
    --cc=devicetree@vger.kernel.org \
    --cc=heiko@sntech.de \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=michael.riesch@wolfvision.net \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.