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From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Bjorn Helgaas" <helgaas@kernel.org>,
	"Gregory CLEMENT" <gregory.clement@bootlin.com>,
	pali@kernel.org, "Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Marek Behún" <kabel@kernel.org>,
	"Lukas Wunner" <lukas@wunner.de>
Subject: [PATCH v2 01/10] PCI: pciehp: Enable Command Completed Interrupt only if supported
Date: Tue, 27 Sep 2022 16:19:17 +0200	[thread overview]
Message-ID: <20220927141926.8895-2-kabel@kernel.org> (raw)
In-Reply-To: <20220927141926.8895-1-kabel@kernel.org>

From: Pali Rohár <pali@kernel.org>

The No Command Completed Support bit in the Slot Capabilities register
indicates whether Command Completed Interrupt Enable is unsupported.

We already check whether No Command Completed Support bit is set in
pcie_wait_cmd(), and do not wait in this case.

Let's not enable this Command Completed Interrupt at all if NCCS is set,
so that when users dump configuration space from userspace, the dump
does not confuse them by saying that Command Completed Interrupt is not
supported, but it is enabled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Lukas Wunner <lukas@wunner.de>
---
 drivers/pci/hotplug/pciehp_hpc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 040ae076ec0e..10e9670eea0b 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -811,7 +811,9 @@ static void pcie_enable_notification(struct controller *ctrl)
 	else
 		cmd |= PCI_EXP_SLTCTL_PDCE;
 	if (!pciehp_poll_mode)
-		cmd |= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE;
+		cmd |= PCI_EXP_SLTCTL_HPIE;
+	if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl))
+		cmd |= PCI_EXP_SLTCTL_CCIE;
 
 	mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
 		PCI_EXP_SLTCTL_PFDE |
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Bjorn Helgaas" <helgaas@kernel.org>,
	"Gregory CLEMENT" <gregory.clement@bootlin.com>,
	pali@kernel.org, "Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Marek Behún" <kabel@kernel.org>,
	"Lukas Wunner" <lukas@wunner.de>
Subject: [PATCH v2 01/10] PCI: pciehp: Enable Command Completed Interrupt only if supported
Date: Tue, 27 Sep 2022 16:19:17 +0200	[thread overview]
Message-ID: <20220927141926.8895-2-kabel@kernel.org> (raw)
In-Reply-To: <20220927141926.8895-1-kabel@kernel.org>

From: Pali Rohár <pali@kernel.org>

The No Command Completed Support bit in the Slot Capabilities register
indicates whether Command Completed Interrupt Enable is unsupported.

We already check whether No Command Completed Support bit is set in
pcie_wait_cmd(), and do not wait in this case.

Let's not enable this Command Completed Interrupt at all if NCCS is set,
so that when users dump configuration space from userspace, the dump
does not confuse them by saying that Command Completed Interrupt is not
supported, but it is enabled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Lukas Wunner <lukas@wunner.de>
---
 drivers/pci/hotplug/pciehp_hpc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 040ae076ec0e..10e9670eea0b 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -811,7 +811,9 @@ static void pcie_enable_notification(struct controller *ctrl)
 	else
 		cmd |= PCI_EXP_SLTCTL_PDCE;
 	if (!pciehp_poll_mode)
-		cmd |= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE;
+		cmd |= PCI_EXP_SLTCTL_HPIE;
+	if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl))
+		cmd |= PCI_EXP_SLTCTL_CCIE;
 
 	mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
 		PCI_EXP_SLTCTL_PFDE |
-- 
2.35.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-09-27 14:19 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-27 14:19 [PATCH v2 00/10] PCI: aardvark controller changes BATCH 6 Marek Behún
2022-09-27 14:19 ` Marek Behún
2022-09-27 14:19 ` Marek Behún [this message]
2022-09-27 14:19   ` [PATCH v2 01/10] PCI: pciehp: Enable Command Completed Interrupt only if supported Marek Behún
2022-12-07 14:29   ` Bjorn Helgaas
2022-12-07 14:29     ` Bjorn Helgaas
2022-09-27 14:19 ` [PATCH v2 02/10] PCI: aardvark: Add support for DLLSC and hotplug interrupt Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 03/10] PCI: aardvark: Send Set_Slot_Power_Limit message Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 04/10] arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-11-27 23:36   ` Gregory CLEMENT
2022-11-27 23:36     ` Gregory CLEMENT
2022-09-27 14:19 ` [PATCH v2 05/10] PCI: aardvark: Add clock support Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 06/10] PCI: aardvark: Add suspend to RAM support Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 07/10] PCI: aardvark: Replace custom PCIE_CORE_ERR_CAPCTL_* macros by linux/pci_regs.h macros Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 08/10] PCI: aardvark: Don't write read-only bits explicitly in PCI_ERR_CAP register Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 09/10] PCI: aardvark: Explicitly disable Marvell strict ordering Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 10/10] PCI: aardvark: Cleanup some register macros Marek Behún
2022-09-27 14:19   ` Marek Behún

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