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From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v8, 3/4] mailbox: mtk-cmdq: add gce ddr enable support flow
Date: Sat, 1 Oct 2022 00:06:37 +0800	[thread overview]
Message-ID: <20220930160638.7588-4-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <20220930160638.7588-1-yongqiang.niu@mediatek.com>

add gce ddr enable control flow when gce suspend/resume

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 04eb44d89119..2db82ff838ed 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -94,6 +94,18 @@ struct gce_plat {
 	u32 gce_num;
 };
 
+static void cmdq_sw_ddr_enable(struct cmdq *cmdq, bool enable)
+{
+	WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks));
+
+	if (enable)
+		writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
+	else
+		writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
+
+	clk_bulk_disable(cmdq->gce_num, cmdq->clocks);
+}
+
 u8 cmdq_get_shift_pa(struct mbox_chan *chan)
 {
 	struct cmdq *cmdq = container_of(chan->mbox, struct cmdq, mbox);
@@ -319,6 +331,9 @@ static int cmdq_suspend(struct device *dev)
 	if (task_running)
 		dev_warn(dev, "exist running task(s) in suspend\n");
 
+	if (cmdq->sw_ddr_en)
+		cmdq_sw_ddr_enable(cmdq, false);
+
 	clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks);
 
 	return 0;
@@ -330,6 +345,10 @@ static int cmdq_resume(struct device *dev)
 
 	WARN_ON(clk_bulk_prepare(cmdq->gce_num, cmdq->clocks));
 	cmdq->suspended = false;
+
+	if (cmdq->sw_ddr_en)
+		cmdq_sw_ddr_enable(cmdq, true);
+
 	return 0;
 }
 
@@ -337,6 +356,9 @@ static int cmdq_remove(struct platform_device *pdev)
 {
 	struct cmdq *cmdq = platform_get_drvdata(pdev);
 
+	if (cmdq->sw_ddr_en)
+		cmdq_sw_ddr_enable(cmdq, false);
+
 	clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks);
 	return 0;
 }
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v8, 3/4] mailbox: mtk-cmdq: add gce ddr enable support flow
Date: Sat, 1 Oct 2022 00:06:37 +0800	[thread overview]
Message-ID: <20220930160638.7588-4-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <20220930160638.7588-1-yongqiang.niu@mediatek.com>

add gce ddr enable control flow when gce suspend/resume

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 04eb44d89119..2db82ff838ed 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -94,6 +94,18 @@ struct gce_plat {
 	u32 gce_num;
 };
 
+static void cmdq_sw_ddr_enable(struct cmdq *cmdq, bool enable)
+{
+	WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks));
+
+	if (enable)
+		writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
+	else
+		writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
+
+	clk_bulk_disable(cmdq->gce_num, cmdq->clocks);
+}
+
 u8 cmdq_get_shift_pa(struct mbox_chan *chan)
 {
 	struct cmdq *cmdq = container_of(chan->mbox, struct cmdq, mbox);
@@ -319,6 +331,9 @@ static int cmdq_suspend(struct device *dev)
 	if (task_running)
 		dev_warn(dev, "exist running task(s) in suspend\n");
 
+	if (cmdq->sw_ddr_en)
+		cmdq_sw_ddr_enable(cmdq, false);
+
 	clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks);
 
 	return 0;
@@ -330,6 +345,10 @@ static int cmdq_resume(struct device *dev)
 
 	WARN_ON(clk_bulk_prepare(cmdq->gce_num, cmdq->clocks));
 	cmdq->suspended = false;
+
+	if (cmdq->sw_ddr_en)
+		cmdq_sw_ddr_enable(cmdq, true);
+
 	return 0;
 }
 
@@ -337,6 +356,9 @@ static int cmdq_remove(struct platform_device *pdev)
 {
 	struct cmdq *cmdq = platform_get_drvdata(pdev);
 
+	if (cmdq->sw_ddr_en)
+		cmdq_sw_ddr_enable(cmdq, false);
+
 	clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks);
 	return 0;
 }
-- 
2.25.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-09-30 16:07 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-30 16:06 [PATCH v8, 0/4] mailbox: mtk-cmdq: add MT8186 support Yongqiang Niu
2022-09-30 16:06 ` Yongqiang Niu
2022-09-30 16:06 ` [PATCH v8, 1/4] mailbox: mtk-cmdq: add gce software ddr enable private data Yongqiang Niu
2022-09-30 16:06   ` Yongqiang Niu
2022-10-03  4:00   ` CK Hu (胡俊光)
2022-10-03  4:00     ` CK Hu (胡俊光)
2022-10-04  9:35     ` yongqiang.niu
2022-10-04  9:35       ` yongqiang.niu
2022-10-04 10:08       ` CK Hu (胡俊光)
2022-10-04 10:08         ` CK Hu (胡俊光)
2022-09-30 16:06 ` [PATCH v8, 2/4] mailbox: mtk-cmdq: instead magic number with GCE_CTRL_BY_SW Yongqiang Niu
2022-09-30 16:06   ` Yongqiang Niu
2022-10-03  3:56   ` CK Hu (胡俊光)
2022-10-03  3:56     ` CK Hu (胡俊光)
2022-10-03 14:49   ` AngeloGioacchino Del Regno
2022-10-03 14:49     ` AngeloGioacchino Del Regno
2022-10-04  9:20     ` yongqiang.niu
2022-10-04  9:20       ` yongqiang.niu
2022-09-30 16:06 ` Yongqiang Niu [this message]
2022-09-30 16:06   ` [PATCH v8, 3/4] mailbox: mtk-cmdq: add gce ddr enable support flow Yongqiang Niu
2022-10-03  5:04   ` CK Hu (胡俊光)
2022-10-03  5:04     ` CK Hu (胡俊光)
2022-10-04  9:30     ` yongqiang.niu
2022-10-04  9:30       ` yongqiang.niu
2022-10-04  9:40       ` CK Hu (胡俊光)
2022-10-04  9:40         ` CK Hu (胡俊光)
2022-10-03 14:54   ` AngeloGioacchino Del Regno
2022-10-03 14:54     ` AngeloGioacchino Del Regno
2022-10-04  9:39     ` yongqiang.niu
2022-10-04  9:39       ` yongqiang.niu
2022-10-04  9:55       ` AngeloGioacchino Del Regno
2022-10-04  9:55         ` AngeloGioacchino Del Regno
2022-09-30 16:06 ` [PATCH v8, 4/4] mailbox: mtk-cmdq: add MT8186 support Yongqiang Niu
2022-09-30 16:06   ` Yongqiang Niu

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