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From: y00318929 <yeyunfeng@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
	<wangkefeng.wang@huawei.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <yeyunfeng@huawei.com>
Subject: [PATCH 2/5] arm64: mm: Extract the processing of asid_generation
Date: Mon, 17 Oct 2022 16:12:55 +0800	[thread overview]
Message-ID: <20221017081258.3678830-3-yeyunfeng@huawei.com> (raw)
In-Reply-To: <20221017081258.3678830-1-yeyunfeng@huawei.com>

From: Yunfeng Ye <yeyunfeng@huawei.com>

To prepare for supporting ASID isolation feature, extract the processing
of asid_generation. it is convenient to modify the asid_generation
centrally.

By the way, It is clearer to put flush_generation() into flush_context().

Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com>
---
 arch/arm64/mm/context.c | 39 ++++++++++++++++++++++++++++++++-------
 1 file changed, 32 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 8549b5f30352..380c7b05c36b 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -102,14 +102,40 @@ static void set_reserved_asid_bits(void)
 		bitmap_clear(asid_map, 0, NUM_USER_ASIDS);
 }
 
-#define asid_gen_match(asid) \
-	(!(((asid) ^ atomic64_read(&asid_generation)) >> asid_bits))
+static void asid_generation_init(void)
+{
+	atomic64_set(&asid_generation, ASID_FIRST_VERSION);
+}
+
+static void flush_generation(void)
+{
+	/* We're out of ASIDs, so increment the global generation count */
+	atomic64_add_return_relaxed(ASID_FIRST_VERSION,
+					&asid_generation);
+}
+
+static inline u64 asid_read_generation(void)
+{
+	return atomic64_read(&asid_generation);
+}
+
+static inline bool asid_match(u64 asid, u64 genid)
+{
+	return (!(((asid) ^ (genid)) >> asid_bits));
+}
+
+static inline bool asid_gen_match(u64 asid)
+{
+	return asid_match(asid, asid_read_generation());
+}
 
 static void flush_context(void)
 {
 	int i;
 	u64 asid;
 
+	flush_generation();
+
 	/* Update the list of reserved ASIDs and the ASID bitmap. */
 	set_reserved_asid_bits();
 
@@ -163,7 +189,7 @@ static u64 new_context(struct mm_struct *mm)
 {
 	static u32 cur_idx = 1;
 	u64 asid = atomic64_read(&mm->context.id);
-	u64 generation = atomic64_read(&asid_generation);
+	u64 generation = asid_read_generation();
 
 	if (asid != 0) {
 		u64 newasid = asid2ctxid(ctxid2asid(asid), generation);
@@ -202,14 +228,12 @@ static u64 new_context(struct mm_struct *mm)
 	if (asid != NUM_USER_ASIDS)
 		goto set_asid;
 
-	/* We're out of ASIDs, so increment the global generation count */
-	generation = atomic64_add_return_relaxed(ASID_FIRST_VERSION,
-						 &asid_generation);
 	flush_context();
 
 	/* We have more ASIDs than CPUs, so this will always succeed */
 	asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, 1);
 
+	generation = asid_read_generation();
 set_asid:
 	__set_bit(asid, asid_map);
 	cur_idx = asid;
@@ -405,7 +429,8 @@ arch_initcall(asids_update_limit);
 static int asids_init(void)
 {
 	asid_bits = get_cpu_asid_bits();
-	atomic64_set(&asid_generation, ASID_FIRST_VERSION);
+	asid_generation_init();
+
 	asid_map = bitmap_zalloc(NUM_USER_ASIDS, GFP_KERNEL);
 	if (!asid_map)
 		panic("Failed to allocate bitmap for %lu ASIDs\n",
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: y00318929 <yeyunfeng@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
	<wangkefeng.wang@huawei.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <yeyunfeng@huawei.com>
Subject: [PATCH 2/5] arm64: mm: Extract the processing of asid_generation
Date: Mon, 17 Oct 2022 16:12:55 +0800	[thread overview]
Message-ID: <20221017081258.3678830-3-yeyunfeng@huawei.com> (raw)
In-Reply-To: <20221017081258.3678830-1-yeyunfeng@huawei.com>

From: Yunfeng Ye <yeyunfeng@huawei.com>

To prepare for supporting ASID isolation feature, extract the processing
of asid_generation. it is convenient to modify the asid_generation
centrally.

By the way, It is clearer to put flush_generation() into flush_context().

Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com>
---
 arch/arm64/mm/context.c | 39 ++++++++++++++++++++++++++++++++-------
 1 file changed, 32 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 8549b5f30352..380c7b05c36b 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -102,14 +102,40 @@ static void set_reserved_asid_bits(void)
 		bitmap_clear(asid_map, 0, NUM_USER_ASIDS);
 }
 
-#define asid_gen_match(asid) \
-	(!(((asid) ^ atomic64_read(&asid_generation)) >> asid_bits))
+static void asid_generation_init(void)
+{
+	atomic64_set(&asid_generation, ASID_FIRST_VERSION);
+}
+
+static void flush_generation(void)
+{
+	/* We're out of ASIDs, so increment the global generation count */
+	atomic64_add_return_relaxed(ASID_FIRST_VERSION,
+					&asid_generation);
+}
+
+static inline u64 asid_read_generation(void)
+{
+	return atomic64_read(&asid_generation);
+}
+
+static inline bool asid_match(u64 asid, u64 genid)
+{
+	return (!(((asid) ^ (genid)) >> asid_bits));
+}
+
+static inline bool asid_gen_match(u64 asid)
+{
+	return asid_match(asid, asid_read_generation());
+}
 
 static void flush_context(void)
 {
 	int i;
 	u64 asid;
 
+	flush_generation();
+
 	/* Update the list of reserved ASIDs and the ASID bitmap. */
 	set_reserved_asid_bits();
 
@@ -163,7 +189,7 @@ static u64 new_context(struct mm_struct *mm)
 {
 	static u32 cur_idx = 1;
 	u64 asid = atomic64_read(&mm->context.id);
-	u64 generation = atomic64_read(&asid_generation);
+	u64 generation = asid_read_generation();
 
 	if (asid != 0) {
 		u64 newasid = asid2ctxid(ctxid2asid(asid), generation);
@@ -202,14 +228,12 @@ static u64 new_context(struct mm_struct *mm)
 	if (asid != NUM_USER_ASIDS)
 		goto set_asid;
 
-	/* We're out of ASIDs, so increment the global generation count */
-	generation = atomic64_add_return_relaxed(ASID_FIRST_VERSION,
-						 &asid_generation);
 	flush_context();
 
 	/* We have more ASIDs than CPUs, so this will always succeed */
 	asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, 1);
 
+	generation = asid_read_generation();
 set_asid:
 	__set_bit(asid, asid_map);
 	cur_idx = asid;
@@ -405,7 +429,8 @@ arch_initcall(asids_update_limit);
 static int asids_init(void)
 {
 	asid_bits = get_cpu_asid_bits();
-	atomic64_set(&asid_generation, ASID_FIRST_VERSION);
+	asid_generation_init();
+
 	asid_map = bitmap_zalloc(NUM_USER_ASIDS, GFP_KERNEL);
 	if (!asid_map)
 		panic("Failed to allocate bitmap for %lu ASIDs\n",
-- 
2.27.0


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  parent reply	other threads:[~2022-10-17  8:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-17  8:12 [PATCH 0/5] Support ASID Isolation mechanism y00318929
2022-10-17  8:12 ` y00318929
2022-10-17  8:12 ` [PATCH 1/5] arm64: mm: Define asid_bitmap structure for pinned_asid y00318929
2022-10-17  8:12   ` y00318929
2022-10-17  8:12 ` y00318929 [this message]
2022-10-17  8:12   ` [PATCH 2/5] arm64: mm: Extract the processing of asid_generation y00318929
2022-10-17  8:12 ` [PATCH 3/5] arm64: mm: Use cpumask in flush_context() y00318929
2022-10-17  8:12   ` y00318929
2022-10-17  8:12 ` [PATCH 4/5] arm64: mm: Support ASID isolation feature y00318929
2022-10-17  8:12   ` y00318929
2022-10-17  8:12 ` [PATCH 5/5] arm64: mm: Add TLB flush trace on context switch y00318929
2022-10-17  8:12   ` y00318929
2022-10-17  8:31 [PATCH 0/5] Support ASID Isolation mechanism Yunfeng Ye
2022-10-17  8:32 ` [PATCH 2/5] arm64: mm: Extract the processing of asid_generation Yunfeng Ye
2022-10-17  8:32   ` Yunfeng Ye

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