From: Brian Norris <briannorris@chromium.org> To: Ulf Hansson <ulf.hansson@linaro.org> Cc: Shawn Lin <shawn.lin@rock-chips.com>, Adrian Hunter <adrian.hunter@intel.com>, Shawn Guo <shawnguo@kernel.org>, Fabio Estevam <festevam@gmail.com>, Faiz Abbas <faiz_abbas@ti.com>, NXP Linux Team <linux-imx@nxp.com>, Haibo Chen <haibo.chen@nxp.com>, Al Cooper <alcooperx@gmail.com>, linux-mmc@vger.kernel.org, Pengutronix Kernel Team <kernel@pengutronix.de>, linux-kernel@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>, Sascha Hauer <s.hauer@pengutronix.de>, Thierry Reding <thierry.reding@gmail.com>, Michal Simek <michal.simek@xilinx.com>, Jonathan Hunter <jonathanh@nvidia.com>, Sowjanya Komatineni <skomatineni@nvidia.com>, linux-arm-kernel@lists.infradead.org, Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>, Brian Norris <briannorris@chromium.org> Subject: [PATCH 4/5] mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI Date: Mon, 17 Oct 2022 20:57:23 -0700 [thread overview] Message-ID: <20221017205610.4.I418c9eaaf754880fcd2698113e8c3ef821a944d7@changeid> (raw) In-Reply-To: <20221018035724.2061127-1-briannorris@chromium.org> [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: 3c4019f97978 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC") Signed-off-by: Brian Norris <briannorris@chromium.org> --- drivers/mmc/host/sdhci-tegra.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 2d2d8260c681..d1d1ae9b2a86 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -367,6 +367,10 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; u32 misc_ctrl, clk_ctrl, pad_ctrl; + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && + tegra_host->enable_hwcq) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (!(mask & SDHCI_RESET_ALL)) -- 2.38.0.413.g74048e4d9e-goog
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <briannorris@chromium.org> To: Ulf Hansson <ulf.hansson@linaro.org> Cc: Shawn Lin <shawn.lin@rock-chips.com>, Adrian Hunter <adrian.hunter@intel.com>, Shawn Guo <shawnguo@kernel.org>, Fabio Estevam <festevam@gmail.com>, Faiz Abbas <faiz_abbas@ti.com>, NXP Linux Team <linux-imx@nxp.com>, Haibo Chen <haibo.chen@nxp.com>, Al Cooper <alcooperx@gmail.com>, linux-mmc@vger.kernel.org, Pengutronix Kernel Team <kernel@pengutronix.de>, linux-kernel@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>, Sascha Hauer <s.hauer@pengutronix.de>, Thierry Reding <thierry.reding@gmail.com>, Michal Simek <michal.simek@xilinx.com>, Jonathan Hunter <jonathanh@nvidia.com>, Sowjanya Komatineni <skomatineni@nvidia.com>, linux-arm-kernel@lists.infradead.org, Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>, Brian Norris <briannorris@chromium.org> Subject: [PATCH 4/5] mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI Date: Mon, 17 Oct 2022 20:57:23 -0700 [thread overview] Message-ID: <20221017205610.4.I418c9eaaf754880fcd2698113e8c3ef821a944d7@changeid> (raw) In-Reply-To: <20221018035724.2061127-1-briannorris@chromium.org> [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: 3c4019f97978 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC") Signed-off-by: Brian Norris <briannorris@chromium.org> --- drivers/mmc/host/sdhci-tegra.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 2d2d8260c681..d1d1ae9b2a86 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -367,6 +367,10 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; u32 misc_ctrl, clk_ctrl, pad_ctrl; + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && + tegra_host->enable_hwcq) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (!(mask & SDHCI_RESET_ALL)) -- 2.38.0.413.g74048e4d9e-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-10-18 3:58 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-10-18 3:57 [PATCH 0/5] mmc: sdhci controllers: Fix SDHCI_RESET_ALL for CQHCI Brian Norris 2022-10-18 3:57 ` Brian Norris 2022-10-18 3:57 ` [PATCH 1/5] mmc: sdhci-of-arasan: " Brian Norris 2022-10-18 3:57 ` Brian Norris 2022-10-18 14:26 ` Guenter Roeck 2022-10-18 14:26 ` Guenter Roeck 2022-10-18 16:13 ` Adrian Hunter 2022-10-18 16:13 ` Adrian Hunter 2022-10-18 16:59 ` Brian Norris 2022-10-18 16:59 ` Brian Norris 2022-10-18 17:58 ` Adrian Hunter 2022-10-18 17:58 ` Adrian Hunter 2022-10-18 3:57 ` [PATCH 2/5] mmc: sdhci-brcmstb: " Brian Norris 2022-10-18 3:57 ` Brian Norris 2022-10-18 3:57 ` [PATCH 3/5] mms: sdhci-esdhc-imx: " Brian Norris 2022-10-18 3:57 ` Brian Norris 2022-10-18 7:22 ` Bough Chen 2022-10-18 7:22 ` Bough Chen 2022-10-19 21:56 ` Brian Norris 2022-10-19 21:56 ` Brian Norris 2022-10-18 3:57 ` Brian Norris [this message] 2022-10-18 3:57 ` [PATCH 4/5] mmc: sdhci-tegra: " Brian Norris 2022-10-18 3:57 ` [PATCH 5/5] mmc: sdhci_am654: " Brian Norris 2022-10-18 3:57 ` Brian Norris
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