From: Brian Norris <briannorris@chromium.org>
To: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
Shawn Guo <shawnguo@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Haibo Chen <haibo.chen@nxp.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Florian Fainelli <f.fainelli@gmail.com>,
Michal Simek <michal.simek@xilinx.com>,
Faiz Abbas <faiz_abbas@ti.com>,
linux-mmc@vger.kernel.org, Jonathan Hunter <jonathanh@nvidia.com>,
Al Cooper <alcooperx@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Sowjanya Komatineni <skomatineni@nvidia.com>,
linux-kernel@vger.kernel.org,
Thierry Reding <thierry.reding@gmail.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Brian Norris <briannorris@chromium.org>
Subject: [PATCH v2 3/7] mmc: sdhci-brcmstb: Fix SDHCI_RESET_ALL for CQHCI
Date: Wed, 19 Oct 2022 14:54:36 -0700 [thread overview]
Message-ID: <20221019145246.v2.3.I6a715feab6d01f760455865e968ecf0d85036018@changeid> (raw)
In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org>
[[ NOTE: this is completely untested by the author, but included solely
because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
drivers using CQHCI might benefit from a similar change, if they
also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
bug on at least MSM, Arasan, and Intel hardware. ]]
SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.
It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.
Fixes: d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)")
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
Changes in v2:
- Rely on cqhci_deactivate() to handle NULL cqe_private, instead of
moving around CQE capability flags
drivers/mmc/host/sdhci-brcmstb.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index aff36a933ebe..d479ca39c987 100644
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -55,6 +55,9 @@ static void brcmstb_reset(struct sdhci_host *host, u8 mask)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host);
+ if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL))
+ cqhci_deactivate(host->mmc);
+
sdhci_reset(host, mask);
/* Reset will clear this, so re-enable it */
--
2.38.0.413.g74048e4d9e-goog
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <briannorris@chromium.org>
To: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
Shawn Guo <shawnguo@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Haibo Chen <haibo.chen@nxp.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Florian Fainelli <f.fainelli@gmail.com>,
Michal Simek <michal.simek@xilinx.com>,
Faiz Abbas <faiz_abbas@ti.com>,
linux-mmc@vger.kernel.org, Jonathan Hunter <jonathanh@nvidia.com>,
Al Cooper <alcooperx@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Sowjanya Komatineni <skomatineni@nvidia.com>,
linux-kernel@vger.kernel.org,
Thierry Reding <thierry.reding@gmail.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Brian Norris <briannorris@chromium.org>
Subject: [PATCH v2 3/7] mmc: sdhci-brcmstb: Fix SDHCI_RESET_ALL for CQHCI
Date: Wed, 19 Oct 2022 14:54:36 -0700 [thread overview]
Message-ID: <20221019145246.v2.3.I6a715feab6d01f760455865e968ecf0d85036018@changeid> (raw)
In-Reply-To: <20221019215440.277643-1-briannorris@chromium.org>
[[ NOTE: this is completely untested by the author, but included solely
because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
drivers using CQHCI might benefit from a similar change, if they
also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
bug on at least MSM, Arasan, and Intel hardware. ]]
SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.
It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.
Fixes: d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)")
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
Changes in v2:
- Rely on cqhci_deactivate() to handle NULL cqe_private, instead of
moving around CQE capability flags
drivers/mmc/host/sdhci-brcmstb.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index aff36a933ebe..d479ca39c987 100644
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -55,6 +55,9 @@ static void brcmstb_reset(struct sdhci_host *host, u8 mask)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host);
+ if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL))
+ cqhci_deactivate(host->mmc);
+
sdhci_reset(host, mask);
/* Reset will clear this, so re-enable it */
--
2.38.0.413.g74048e4d9e-goog
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next prev parent reply other threads:[~2022-10-19 21:55 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 21:54 [PATCH v2 0/7] mmc: sdhci controllers: Fix SDHCI_RESET_ALL for CQHCI Brian Norris
2022-10-19 21:54 ` Brian Norris
2022-10-19 21:54 ` [PATCH v2 1/7] mmc: cqhci: Handle deactivate() when not yet initialized Brian Norris
2022-10-19 21:54 ` Brian Norris
2022-10-19 21:54 ` [PATCH v2 2/7] mmc: sdhci-of-arasan: Fix SDHCI_RESET_ALL for CQHCI Brian Norris
2022-10-19 21:54 ` Brian Norris
2022-10-19 21:59 ` Florian Fainelli
2022-10-19 21:59 ` Florian Fainelli
2022-10-19 22:19 ` Brian Norris
2022-10-19 22:19 ` Brian Norris
2022-10-20 6:29 ` Adrian Hunter
2022-10-20 6:29 ` Adrian Hunter
2022-10-21 17:45 ` Florian Fainelli
2022-10-21 17:45 ` Florian Fainelli
2022-10-23 16:47 ` Adrian Hunter
2022-10-23 16:47 ` Adrian Hunter
2022-10-19 21:54 ` Brian Norris [this message]
2022-10-19 21:54 ` [PATCH v2 3/7] mmc: sdhci-brcmstb: " Brian Norris
2022-10-19 21:54 ` [PATCH v2 4/7] mms: sdhci-esdhc-imx: " Brian Norris
2022-10-19 21:54 ` Brian Norris
2022-10-21 2:35 ` Bough Chen
2022-10-21 2:35 ` Bough Chen
2022-10-19 21:54 ` [PATCH v2 5/7] mmc: sdhci-tegra: " Brian Norris
2022-10-19 21:54 ` Brian Norris
2022-10-19 21:54 ` [PATCH v2 6/7] mmc: sdhci_am654: " Brian Norris
2022-10-19 21:54 ` Brian Norris
2022-10-19 21:54 ` [PATCH v2 7/7] mmc: sdhci-pci-*: Drop redundant ->cqe_private check Brian Norris
2022-10-19 21:54 ` Brian Norris
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