All of lore.kernel.org
 help / color / mirror / Atom feed
From: Amit Daniel Kachhap <amit.kachhap@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Amit Daniel Kachhap <amit.kachhap@arm.com>
Subject: [PATCH 4/8] arm64: Add compat hwcap ASIMDFHM
Date: Wed, 26 Oct 2022 11:28:09 +0530	[thread overview]
Message-ID: <20221026055813.13484-5-amit.kachhap@arm.com> (raw)
In-Reply-To: <20221026055813.13484-1-amit.kachhap@arm.com>

This hwcap is earlier added for 32-bit native arm kernel and hence the
corresponding changes added in 32-bit compat arm64 also for similar user
interface. Floating-point half-precision multiplication (FHM) is a feature
present in AArch32/AArch64 state for Armv8 and is identified by ISAR6.FHM
identification register. This hwcap is already advertised in arm64 kernel.

Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
---
 arch/arm64/include/asm/hwcap.h | 1 +
 arch/arm64/kernel/cpufeature.c | 3 ++-
 arch/arm64/kernel/cpuinfo.c    | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index cb0d215d776f..8d944397a9a3 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -34,6 +34,7 @@
 #define COMPAT_HWCAP_FPHP	(1 << 22)
 #define COMPAT_HWCAP_ASIMDHP	(1 << 23)
 #define COMPAT_HWCAP_ASIMDDP	(1 << 24)
+#define COMPAT_HWCAP_ASIMDFHM	(1 << 25)
 
 #define COMPAT_HWCAP2_AES	(1 << 0)
 #define COMPAT_HWCAP2_PMULL	(1 << 1)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 010eaf96cc3b..8b6d0ed571ce 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -531,7 +531,7 @@ static const struct arm64_ftr_bits ftr_id_isar6[] = {
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_BF16_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_SPECRES_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_SB_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_FHM_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_FHM_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_DP_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_JSCVT_SHIFT, 4, 0),
 	ARM64_FTR_END,
@@ -2850,6 +2850,7 @@ static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = {
 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA2_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA2),
 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_CRC32_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_CRC32),
 	HWCAP_CAP(SYS_ID_ISAR6_EL1, ID_ISAR6_DP_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_ASIMDDP),
+	HWCAP_CAP(SYS_ID_ISAR6_EL1, ID_ISAR6_FHM_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_ASIMDFHM),
 #endif
 	{},
 };
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 5875865c5bfd..23afcd80c7fd 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -146,6 +146,7 @@ static const char *const compat_hwcap_str[] = {
 	[COMPAT_KERNEL_HWCAP(FPHP)]	= "fphp",
 	[COMPAT_KERNEL_HWCAP(ASIMDHP)]	= "asimdhp",
 	[COMPAT_KERNEL_HWCAP(ASIMDDP)]	= "asimddp",
+	[COMPAT_KERNEL_HWCAP(ASIMDFHM)]	= "asimdfhm",
 };
 
 #define COMPAT_KERNEL_HWCAP2(x)	const_ilog2(COMPAT_HWCAP2_ ## x)
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-10-26  6:00 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-26  5:58 [PATCH 0/8] arm64: Expose compat Armv8 AArch32 features Amit Daniel Kachhap
2022-10-26  5:58 ` [PATCH 1/8] arm64: cpufeature: Fix the visibility of compat hwcaps Amit Daniel Kachhap
2022-10-26 15:15   ` James Morse
2022-11-02 10:47     ` Amit Kachhap
2022-11-01 19:07   ` Catalin Marinas
2022-10-26  5:58 ` [PATCH 2/8] arm64: Add compat hwcap FPHP and ASIMDHP Amit Daniel Kachhap
2022-11-09 18:00   ` Will Deacon
2022-11-10  4:18     ` Amit Kachhap
2022-11-15 15:32       ` Catalin Marinas
2022-10-26  5:58 ` [PATCH 3/8] arm64: Add compat hwcap ASIMDDP Amit Daniel Kachhap
2022-10-26  5:58 ` Amit Daniel Kachhap [this message]
2022-10-26  5:58 ` [PATCH 5/8] arm64: Add compat hwcap ASIMDBF16 Amit Daniel Kachhap
2022-10-26  5:58 ` [PATCH 6/8] arm64: Add compat hwcap I8MM Amit Daniel Kachhap
2022-10-26  5:58 ` [PATCH 7/8] arm64: Add compat hwcap SB Amit Daniel Kachhap
2022-10-26  5:58 ` [PATCH 8/8] arm64: Add compat hwcap SSBS Amit Daniel Kachhap

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221026055813.13484-5-amit.kachhap@arm.com \
    --to=amit.kachhap@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.