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From: Juergen Gross <jgross@suse.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: Juergen Gross <jgross@suse.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: [PATCH v5 11/16] x86/mtrr: let cache_aps_delayed_init replace mtrr_aps_delayed_init
Date: Wed,  2 Nov 2022 08:47:08 +0100	[thread overview]
Message-ID: <20221102074713.21493-12-jgross@suse.com> (raw)
In-Reply-To: <20221102074713.21493-1-jgross@suse.com>

In order to prepare decoupling MTRR and PAT replace the MTRR specific
mtrr_aps_delayed_init flag with a more generic cache_aps_delayed_init
one.

Signed-off-by: Juergen Gross <jgross@suse.com>
---
V2:
- new patch
V4:
- reestablish function to set cache_aps_delayed_init (Borislav Petkov)
V5:
- make cache_aps_delayed_init static, add get accessor (Borislav Petkov)
---
 arch/x86/include/asm/cacheinfo.h |  2 ++
 arch/x86/include/asm/mtrr.h      |  2 --
 arch/x86/kernel/cpu/cacheinfo.c  | 12 ++++++++++++
 arch/x86/kernel/cpu/mtrr/mtrr.c  | 18 +++++-------------
 arch/x86/kernel/smpboot.c        |  5 +++--
 5 files changed, 22 insertions(+), 17 deletions(-)

diff --git a/arch/x86/include/asm/cacheinfo.h b/arch/x86/include/asm/cacheinfo.h
index 978bac70fd49..e443fcc1f045 100644
--- a/arch/x86/include/asm/cacheinfo.h
+++ b/arch/x86/include/asm/cacheinfo.h
@@ -13,5 +13,7 @@ void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu);
 void cache_disable(void);
 void cache_enable(void);
 void cache_cpu_init(void);
+void set_cache_aps_delayed_init(bool val);
+bool get_cache_aps_delayed_init(void);
 
 #endif /* _ASM_X86_CACHEINFO_H */
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 986249a2b9b6..5d31219c8529 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -43,7 +43,6 @@ extern int mtrr_del(int reg, unsigned long base, unsigned long size);
 extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
 extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
 extern void mtrr_ap_init(void);
-extern void set_mtrr_aps_delayed_init(void);
 extern void mtrr_aps_init(void);
 extern void mtrr_bp_restore(void);
 extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
@@ -87,7 +86,6 @@ static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
 {
 }
 #define mtrr_ap_init() do {} while (0)
-#define set_mtrr_aps_delayed_init() do {} while (0)
 #define mtrr_aps_init() do {} while (0)
 #define mtrr_bp_restore() do {} while (0)
 #define mtrr_disable() do {} while (0)
diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index 81ab99fe92bd..931ba3fb1363 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -1137,3 +1137,15 @@ void cache_cpu_init(void)
 	cache_enable();
 	local_irq_restore(flags);
 }
+
+static bool cache_aps_delayed_init;
+
+void set_cache_aps_delayed_init(bool val)
+{
+	cache_aps_delayed_init = val;
+}
+
+bool get_cache_aps_delayed_init(void)
+{
+	return cache_aps_delayed_init;
+}
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index f671be9823b6..15ee6d72fb1f 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -68,7 +68,6 @@ unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
 static DEFINE_MUTEX(mtrr_mutex);
 
 u64 size_or_mask, size_and_mask;
-static bool mtrr_aps_delayed_init;
 
 static const struct mtrr_ops *mtrr_ops[X86_VENDOR_NUM] __ro_after_init;
 
@@ -175,7 +174,8 @@ static int mtrr_rendezvous_handler(void *info)
 	if (data->smp_reg != ~0U) {
 		mtrr_if->set(data->smp_reg, data->smp_base,
 			     data->smp_size, data->smp_type);
-	} else if (mtrr_aps_delayed_init || !cpu_online(smp_processor_id())) {
+	} else if (get_cache_aps_delayed_init() ||
+		   !cpu_online(smp_processor_id())) {
 		cache_cpu_init();
 	}
 	return 0;
@@ -782,7 +782,7 @@ void __init mtrr_bp_init(void)
 
 void mtrr_ap_init(void)
 {
-	if (!memory_caching_control || mtrr_aps_delayed_init)
+	if (!memory_caching_control || get_cache_aps_delayed_init())
 		return;
 
 	/*
@@ -816,14 +816,6 @@ void mtrr_save_state(void)
 	smp_call_function_single(first_cpu, mtrr_save_fixed_ranges, NULL, 1);
 }
 
-void set_mtrr_aps_delayed_init(void)
-{
-	if (!memory_caching_control)
-		return;
-
-	mtrr_aps_delayed_init = true;
-}
-
 /*
  * Delayed MTRR initialization for all AP's
  */
@@ -837,11 +829,11 @@ void mtrr_aps_init(void)
 	 * by doing set_mtrr_aps_delayed_init(), prior to this point. If not,
 	 * then we are done.
 	 */
-	if (!mtrr_aps_delayed_init)
+	if (!get_cache_aps_delayed_init())
 		return;
 
 	set_mtrr(~0U, 0, 0, 0);
-	mtrr_aps_delayed_init = false;
+	set_cache_aps_delayed_init(false);
 }
 
 void mtrr_bp_restore(void)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 3f3ea0287f69..13c71ab29d84 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -58,6 +58,7 @@
 #include <linux/overflow.h>
 
 #include <asm/acpi.h>
+#include <asm/cacheinfo.h>
 #include <asm/desc.h>
 #include <asm/nmi.h>
 #include <asm/irq.h>
@@ -1428,7 +1429,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 
 	uv_system_init();
 
-	set_mtrr_aps_delayed_init();
+	set_cache_aps_delayed_init(true);
 
 	smp_quirk_init_udelay();
 
@@ -1439,7 +1440,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 
 void arch_thaw_secondary_cpus_begin(void)
 {
-	set_mtrr_aps_delayed_init();
+	set_cache_aps_delayed_init(true);
 }
 
 void arch_thaw_secondary_cpus_end(void)
-- 
2.35.3


  parent reply	other threads:[~2022-11-02  7:48 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-02  7:46 [PATCH v5 00/16] x86: make PAT and MTRR independent from each other Juergen Gross
2022-11-02  7:46 ` [PATCH v5 01/16] x86/mtrr: add comment for set_mtrr_state() serialization Juergen Gross
2022-11-02  7:46 ` [PATCH v5 02/16] x86/mtrr: remove unused cyrix_set_all() function Juergen Gross
2022-11-02  7:47 ` [PATCH v5 03/16] x86/mtrr: replace use_intel() with a local flag Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Replace " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 04/16] x86/mtrr: rename prepare_set() and post_set() Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Rename " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 05/16] x86/mtrr: split MTRR specific handling from cache dis/enabling Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Split MTRR-specific " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 06/16] x86: move some code out of arch/x86/kernel/cpu/mtrr Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Move cache control code to cacheinfo.c tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 07/16] x86/mtrr: Disentangle MTRR init from PAT init Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 08/16] x86/mtrr: remove set_all callback from struct mtrr_ops Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Remove " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 09/16] x86/mtrr: simplify mtrr_bp_init() Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Simplify mtrr_bp_init() tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 10/16] x86/mtrr: get rid of __mtrr_enabled bool Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Get " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` Juergen Gross [this message]
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Let cache_aps_delayed_init replace mtrr_aps_delayed_init tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 12/16] x86/mtrr: add a stop_machine() handler calling only cache_cpu_init() Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Add " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 13/16] x86: decouple PAT and MTRR handling Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86: Decouple " tip-bot2 for Juergen Gross
2022-12-01 16:26   ` [PATCH v5 13/16] x86: decouple " Kirill A. Shutemov
2022-12-01 16:33     ` Juergen Gross
2022-12-01 23:57       ` Kirill A. Shutemov
2022-12-02  5:56         ` Juergen Gross
2022-12-02 13:27           ` Kirill A. Shutemov
2022-12-02 13:39             ` Juergen Gross
2022-12-02 14:33               ` Kirill A. Shutemov
2022-12-02 14:56                 ` Juergen Gross
2022-12-05  7:40                   ` Juergen Gross
2022-12-05 12:21                     ` Kirill A. Shutemov
2022-12-02 13:55           ` Borislav Petkov
2022-11-02  7:47 ` [PATCH v5 14/16] x86: switch cache_ap_init() to hotplug callback Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/cacheinfo: Switch " tip-bot2 for Juergen Gross
2022-11-02  7:47 ` [PATCH v5 15/16] x86: do MTRR/PAT setup on all secondary CPUs in parallel Juergen Gross
2022-11-02  7:47 ` [PATCH v5 16/16] x86/mtrr: simplify mtrr_ops initialization Juergen Gross
2022-11-10 12:21   ` [tip: x86/cpu] x86/mtrr: Simplify " tip-bot2 for Juergen Gross
2022-11-02 18:04 ` [PATCH v5 00/16] x86: make PAT and MTRR independent from each other Borislav Petkov
2022-11-03  8:40   ` Juergen Gross
2022-11-03 16:15     ` Borislav Petkov
2022-11-07 19:25       ` Borislav Petkov
2022-11-08  7:30         ` Juergen Gross

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