From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [RFC 12/15] drm/i915/display/mtl: Reset FRL Transcoder config while disabling HDMI Date: Mon, 7 Nov 2022 12:50:42 +0530 [thread overview] Message-ID: <20221107072045.628895-13-ankit.k.nautiyal@intel.com> (raw) In-Reply-To: <20221107072045.628895-1-ankit.k.nautiyal@intel.com> While disabling HDMI, reset the FRL transcoder config if FRL mode was used. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 5e2e4c78c564..cb0d19b6ee56 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2667,6 +2667,8 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_digital_port *dig_port = enc_to_dig_port(encoder); struct intel_hdmi *intel_hdmi = &dig_port->hdmi; + enum transcoder hdmi_transcoder; + u8 buf; dig_port->set_infoframes(encoder, false, old_crtc_state, old_conn_state); @@ -2679,6 +2681,16 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, if (DISPLAY_VER(dev_priv) >= 12) intel_ddi_disable_pipe_clock(old_crtc_state); + if (old_crtc_state->frl.enable) { + hdmi_transcoder = old_crtc_state->cpu_transcoder; + buf = intel_de_read(dev_priv, + TRANS_HDMI_FRL_CFG(hdmi_transcoder)); + buf &= ~(TRANS_HDMI_FRL_ENABLE | TRANS_HDMI_FRL_TRAINING_COMPLETE); + + intel_de_write(dev_priv, + TRANS_HDMI_FRL_CFG(hdmi_transcoder), buf); + } + intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain, fetch_and_zero(&dig_port->ddi_io_wakeref)); -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vandita.kulkarni@intel.com, uma.shankar@intel.com, mika.kahola@intel.com, radhakrishna.sripada@intel.com Subject: [RFC 12/15] drm/i915/display/mtl: Reset FRL Transcoder config while disabling HDMI Date: Mon, 7 Nov 2022 12:50:42 +0530 [thread overview] Message-ID: <20221107072045.628895-13-ankit.k.nautiyal@intel.com> (raw) In-Reply-To: <20221107072045.628895-1-ankit.k.nautiyal@intel.com> While disabling HDMI, reset the FRL transcoder config if FRL mode was used. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 5e2e4c78c564..cb0d19b6ee56 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2667,6 +2667,8 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_digital_port *dig_port = enc_to_dig_port(encoder); struct intel_hdmi *intel_hdmi = &dig_port->hdmi; + enum transcoder hdmi_transcoder; + u8 buf; dig_port->set_infoframes(encoder, false, old_crtc_state, old_conn_state); @@ -2679,6 +2681,16 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, if (DISPLAY_VER(dev_priv) >= 12) intel_ddi_disable_pipe_clock(old_crtc_state); + if (old_crtc_state->frl.enable) { + hdmi_transcoder = old_crtc_state->cpu_transcoder; + buf = intel_de_read(dev_priv, + TRANS_HDMI_FRL_CFG(hdmi_transcoder)); + buf &= ~(TRANS_HDMI_FRL_ENABLE | TRANS_HDMI_FRL_TRAINING_COMPLETE); + + intel_de_write(dev_priv, + TRANS_HDMI_FRL_CFG(hdmi_transcoder), buf); + } + intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain, fetch_and_zero(&dig_port->ddi_io_wakeref)); -- 2.25.1
next prev parent reply other threads:[~2022-11-07 7:21 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-07 7:20 [Intel-gfx] [RFC 00/15] Add support for HDMI2.1 FRL Ankit Nautiyal 2022-11-07 7:20 ` Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] [RFC 01/15] drm/edid: Add helper to get max FRL rate for an HDMI sink Ankit Nautiyal 2022-11-07 7:20 ` Ankit Nautiyal 2022-11-07 7:20 ` [RFC 02/15] drm/i915/dp: Use the drm helpers for getting max FRL rate Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 03/15] drm/i915/mtl: Create separate reg file for PICA registers Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 04/15] drm/i915/hdmi21/mtl: Parse frl max link rate from vbt Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 05/15] drm/i915/hdmi21/mtl: Add new data members for FRL configuration Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 06/15] drm/drm_scdc_helper: Add SCDC helper funcs for HDMI2.1 Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 07/15] drm/i915/mtl: Add registers for FRL Link Training Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 08/15] drm/i915/mtl: Add HDMI2.1 bits in PORT_BUF_CTL_1 Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 09/15] drm/i915/mtl: Add port_data/data width for TRANS_DDI_FUNC and DDI_BUF_CTL Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 10/15] drm/i915/display/mtl: Add new members in crtc_state for FRL configuration Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 11/15] drm/i915/display/mtl: Update Transcoder/DDI registers with the frl bits Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` Ankit Nautiyal [this message] 2022-11-07 7:20 ` [RFC 12/15] drm/i915/display/mtl: Reset FRL Transcoder config while disabling HDMI Ankit Nautiyal 2022-11-07 7:20 ` [RFC 13/15] drm/i915/hdmi21/mtl: Enable Scrambling only for FRL mode Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 14/15] drm/i915/hdmi21/mtl: Add support for sending uevent to user for FRL training failure Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 7:20 ` [RFC 15/15] drm/i915/display/mtl: Add functions for FRL trainining state machine Ankit Nautiyal 2022-11-07 7:20 ` [Intel-gfx] " Ankit Nautiyal 2022-11-07 8:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for HDMI2.1 FRL Patchwork 2022-11-07 8:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-11-07 8:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-11-07 9:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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