From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-fpga@vger.kernel.org, Xu Yilun <yilun.xu@intel.com>,
Wu Hao <hao.wu@intel.com>, Tom Rix <trix@redhat.com>,
Moritz Fischer <mdf@kernel.org>, Lee Jones <lee@kernel.org>,
Matthew Gerlach <matthew.gerlach@linux.intel.com>,
Russ Weight <russell.h.weight@intel.com>,
Tianfei zhang <tianfei.zhang@intel.com>,
Mark Brown <broonie@kernel.org>,
Greg KH <gregkh@linuxfoundation.org>
Cc: linux-kernel@vger.kernel.org,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 00/12] intel-m10-bmc: Split BMC to core and SPI parts & add PMCI+N6000 support
Date: Tue, 8 Nov 2022 16:42:53 +0200 [thread overview]
Message-ID: <20221108144305.45424-1-ilpo.jarvinen@linux.intel.com> (raw)
Hi all,
Here are the patches for MAX 10 BMC core/SPI interface split and
addition of the PMCI interface. There are a few supporting rearrangement
patches prior to the actual split. This series also introduced regmap for
indirect register access generic to Intel FPGA IPs.
The current downside of the split is that there's not that much code
remaining in the core part when all the type specific definitions are
moved to the file with the relevant interface.
Ilpo Järvinen (12):
mfd: intel-m10-bmc: Move m10bmc_type to header
mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
mfd: intel-m10-bmc: Rename the local variables
mfd: intel-m10-bmc: Split into core and spi specific parts
mfd: intel-m10-bmc: Support multiple CSR register layouts
fpga: intel-m10-bmc: Add flash ops for sec update
mfd: intel-m10-bmc: Downscope SPI related defines
regmap: indirect: Add indirect regmap support
intel-m10-bmc: Add regmap_indirect_cfg for Intel FPGA IPs
mfd: intel-m10-bmc: Add PMCI driver
fpga: m10bmc-sec: Add support for N6000
mfd: intel-m10-bmc: Change MODULE_LICENSE() to GPL
.../ABI/testing/sysfs-driver-intel-m10-bmc | 8 +-
MAINTAINERS | 2 +-
drivers/base/regmap/Kconfig | 3 +
drivers/base/regmap/Makefile | 1 +
drivers/base/regmap/regmap-indirect.c | 128 +++++++
drivers/fpga/Kconfig | 2 +-
drivers/fpga/intel-m10-bmc-sec-update.c | 149 ++++----
drivers/hwmon/Kconfig | 2 +-
drivers/mfd/Kconfig | 34 +-
drivers/mfd/Makefile | 6 +-
drivers/mfd/intel-m10-bmc-core.c | 133 +++++++
drivers/mfd/intel-m10-bmc-pmci.c | 339 ++++++++++++++++++
drivers/mfd/intel-m10-bmc-spi.c | 262 ++++++++++++++
drivers/mfd/intel-m10-bmc.c | 238 ------------
include/linux/mfd/intel-m10-bmc.h | 131 ++++---
include/linux/regmap.h | 55 +++
16 files changed, 1110 insertions(+), 383 deletions(-)
create mode 100644 drivers/base/regmap/regmap-indirect.c
create mode 100644 drivers/mfd/intel-m10-bmc-core.c
create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c
create mode 100644 drivers/mfd/intel-m10-bmc-spi.c
delete mode 100644 drivers/mfd/intel-m10-bmc.c
--
2.30.2
next reply other threads:[~2022-11-08 14:43 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-08 14:42 Ilpo Järvinen [this message]
2022-11-08 14:42 ` [PATCH 01/12] mfd: intel-m10-bmc: Move m10bmc_type to header Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 02/12] mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info Ilpo Järvinen
2022-11-11 10:12 ` Xu Yilun
2022-11-11 11:49 ` Ilpo Järvinen
2022-11-14 1:58 ` Xu Yilun
2022-11-15 1:17 ` Russ Weight
2022-11-15 1:55 ` Xu Yilun
2022-11-15 8:56 ` Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 03/12] mfd: intel-m10-bmc: Rename the local variables Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 04/12] mfd: intel-m10-bmc: Split into core and spi specific parts Ilpo Järvinen
2022-11-08 17:05 ` Guenter Roeck
2022-11-08 14:42 ` [PATCH 05/12] mfd: intel-m10-bmc: Support multiple CSR register layouts Ilpo Järvinen
2022-11-08 14:42 ` [PATCH 06/12] fpga: intel-m10-bmc: Add flash ops for sec update Ilpo Järvinen
2022-11-11 8:41 ` Xu Yilun
2022-11-11 13:32 ` Ilpo Järvinen
2022-11-14 7:31 ` Xu Yilun
2022-11-15 1:43 ` Russ Weight
2022-11-15 2:55 ` Xu Yilun
2022-11-08 14:43 ` [PATCH 07/12] mfd: intel-m10-bmc: Downscope SPI related defines Ilpo Järvinen
2022-11-11 9:29 ` Xu Yilun
2022-11-11 11:20 ` Ilpo Järvinen
2022-11-14 7:33 ` Xu Yilun
2022-11-08 14:43 ` [PATCH 08/12] regmap: indirect: Add indirect regmap support Ilpo Järvinen
2022-11-14 20:38 ` Marco Pagani
2022-11-16 17:00 ` matthew.gerlach
2022-11-08 14:43 ` [PATCH 09/12] intel-m10-bmc: Add regmap_indirect_cfg for Intel FPGA IPs Ilpo Järvinen
2022-11-08 18:29 ` matthew.gerlach
2022-11-08 14:43 ` [PATCH 10/12] mfd: intel-m10-bmc: Add PMCI driver Ilpo Järvinen
2022-11-11 10:04 ` Xu Yilun
2022-11-11 13:16 ` Ilpo Järvinen
2022-11-14 2:18 ` Xu Yilun
2022-11-14 12:25 ` Zhang, Tianfei
2022-11-08 14:43 ` [PATCH 11/12] fpga: m10bmc-sec: Add support for N6000 Ilpo Järvinen
2022-11-08 14:43 ` [PATCH 12/12] mfd: intel-m10-bmc: Change MODULE_LICENSE() to GPL Ilpo Järvinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221108144305.45424-1-ilpo.jarvinen@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=broonie@kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=hao.wu@intel.com \
--cc=lee@kernel.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=matthew.gerlach@linux.intel.com \
--cc=mdf@kernel.org \
--cc=russell.h.weight@intel.com \
--cc=tianfei.zhang@intel.com \
--cc=trix@redhat.com \
--cc=yilun.xu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.