[PATCH v1 0/4] Route RISC-V SoC drivers/firmware/DT via the soc tree

From: Conor Dooley <conor@kernel.org>
To: Emil Renner Berthing <kernel@esmil.dk>,
	Arnd Bergmann <arnd@arndb.de>,
	Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	soc@kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v1 0/4] Route RISC-V SoC drivers/firmware/DT via the soc tree
Date: Wed,  9 Nov 2022 21:22:16 +0000	[thread overview]
Message-ID: <20221109212219.1598355-1-conor@kernel.org> (raw)

From: Conor Dooley <conor.dooley@microchip.com>

Spoke to Palmer today at the linux-riscv pw sync-up (see [0] for anyone
that may see this and is interested), and he said go for it w/
MAINTAINERS changes. Routing patches this way was proposed by Palmer @
[1] where Arnd & I had a wee bit of back and forth about the maintainers
entries required.

I've CC'ed soc@kernel.org with the expectation that this series will go
via the soc tree with Palmer's ack.

I noticed while running the maintainers pattern check that I had messed
up the i2c driver in an earlier submission - I think that Lukas may have
flagged that but since It's not been fixed I've tacked on a patch for
that too since I'm already in the area...

Thanks,
Conor.

0 - https://lore.kernel.org/linux-riscv/mhng-775d4068-6c1e-48a4-a1dc-b4a76ff26bb3@palmer-ri-x1c9a/
1 - https://lore.kernel.org/linux-riscv/mhng-e4210f56-fcc3-4db8-abdb-d43b3ebe695d@palmer-ri-x1c9a/

Conor Dooley (4):
  MAINTAINERS: add entries for misc. RISC-V SoC drivers and devicetrees
  MAINTAINERS: generify the Microchip RISC-V entry name
  MAINTAINERS: add an entry for StarFive devicetrees
  MAINTAINERS: repair Microchip corei2c driver entry

 MAINTAINERS | 34 ++++++++++++++++++++++++++++++----
 1 file changed, 30 insertions(+), 4 deletions(-)

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