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From: Yang Yingliang <yangyingliang@huawei.com>
To: <fenghua.yu@intel.com>
Cc: <linux-hwmon@vger.kernel.org>, <jdelvare@suse.com>,
	<linux@roeck-us.net>, <yangyingliang@huawei.com>
Subject: [PATCH] hwmon: (coretemp) fix pci device refcount leak in nv1a_ram_new()
Date: Fri, 18 Nov 2022 17:33:03 +0800	[thread overview]
Message-ID: <20221118093303.214163-1-yangyingliang@huawei.com> (raw)

As comment of pci_get_domain_bus_and_slot() says, it returns
a pci device with refcount increment, when finish using it,
the caller must decrement the reference count by calling
pci_dev_put(). So call it after using to avoid refcount leak.

Fixes: 14513ee696a0 ("hwmon: (coretemp) Use PCI host bridge ID to identify CPU if necessary")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
 drivers/hwmon/coretemp.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 8bf32c6c85d9..84a980fa0671 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -242,10 +242,13 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
 	 */
 	if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
 		for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
-			if (host_bridge->device == tjmax_pci_table[i].device)
+			if (host_bridge->device == tjmax_pci_table[i].device) {
+				pci_dev_put(host_bridge);
 				return tjmax_pci_table[i].tjmax;
+			}
 		}
 	}
+	pci_dev_put(host_bridge);
 
 	for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
 		if (strstr(c->x86_model_id, tjmax_table[i].id))
-- 
2.25.1


             reply	other threads:[~2022-11-18  9:34 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18  9:33 Yang Yingliang [this message]
2022-11-20 13:51 ` [PATCH] hwmon: (coretemp) fix pci device refcount leak in nv1a_ram_new() Guenter Roeck

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