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From: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
To: <xen-devel@lists.xenproject.org>
Cc: <sstabellini@kernel.org>, <stefanos@xilinx.com>, <julien@xen.org>,
	<Volodymyr_Babchuk@epam.com>, <bertrand.marquis@arm.com>,
	<michal.orzel@amd.com>, <jgrall@amazon.com>,
	<burzalodowa@gmail.com>,
	"Ayan Kumar Halder" <ayan.kumar.halder@amd.com>
Subject: [XEN v4 01/11] xen/Arm: vGICv3: Sysreg emulation is applicable for AArch64 only
Date: Mon, 28 Nov 2022 15:56:39 +0000	[thread overview]
Message-ID: <20221128155649.31386-2-ayan.kumar.halder@amd.com> (raw)
In-Reply-To: <20221128155649.31386-1-ayan.kumar.halder@amd.com>

Sysreg emulation is 64-bit specific, so guard the calls to
vgic_v3_emulate_sysreg() as well as the function itself with
"#ifdef CONFIG_ARM_64".

Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
Acked-by: Julien Grall <julien@xen.org>
---

Changes from -
v1 - 1. Updated the commit message.

v2 - 1. Updated the commit message (removed the reference to Arm ARM as it is
not required).

v3 - No changes. Added Rb and Ack.

 xen/arch/arm/vgic-v3.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 015446be17..3f4509dcd3 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1519,6 +1519,7 @@ static bool vgic_v3_emulate_sgi1r(struct cpu_user_regs *regs, uint64_t *r,
     }
 }
 
+#ifdef CONFIG_ARM_64
 static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
 {
     struct hsr_sysreg sysreg = hsr.sysreg;
@@ -1539,6 +1540,7 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
         return false;
     }
 }
+#endif
 
 static bool vgic_v3_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
 {
@@ -1562,8 +1564,10 @@ static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
 {
     switch (hsr.ec)
     {
+#ifdef CONFIG_ARM_64
     case HSR_EC_SYSREG:
         return vgic_v3_emulate_sysreg(regs, hsr);
+#endif
     case HSR_EC_CP15_64:
         return vgic_v3_emulate_cp64(regs, hsr);
     default:
-- 
2.17.1



  reply	other threads:[~2022-11-28 15:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-28 15:56 [XEN v4 00/11] Arm: Enable GICv3 for AArch32 Ayan Kumar Halder
2022-11-28 15:56 ` Ayan Kumar Halder [this message]
2022-11-28 15:56 ` [XEN v4 02/11] xen/Arm: GICv3: Do not calculate affinity level 3 " Ayan Kumar Halder
2022-12-03 18:14   ` Julien Grall
2022-11-28 15:56 ` [XEN v4 03/11] xen/Arm: vreg: Support vreg_reg64_* helpers on AArch32 Ayan Kumar Halder
2022-11-28 15:56 ` [XEN v4 04/11] xen/Arm: vGICv3: Adapt emulation of GICR_TYPER for AArch32 Ayan Kumar Halder
2022-12-03 18:16   ` Julien Grall
2022-11-28 15:56 ` [XEN v4 05/11] xen/Arm: GICv3: Fix GICR_{PENDBASER, PROPBASER} emulation on 32-bit host Ayan Kumar Halder
2022-11-28 15:56 ` [XEN v4 06/11] xen/Arm: vGICv3: Fix emulation of ICC_SGI1R on AArch32 Ayan Kumar Halder
2022-11-28 15:56 ` [XEN v4 07/11] xen/Arm: GICv3: Define ICH_LR<n>_EL2 " Ayan Kumar Halder
2022-11-29 14:33   ` Michal Orzel
2022-12-03 18:35     ` Julien Grall
2022-12-03 20:02       ` Ayan Kumar Halder
2022-12-03 21:09         ` Julien Grall
2022-11-28 15:56 ` [XEN v4 08/11] xen/Arm: GICv3: Define ICH_AP0R<n> and ICH_AP1R<n> for AArch32 Ayan Kumar Halder
2022-11-29 14:35   ` Michal Orzel
2022-11-28 15:56 ` [XEN v4 09/11] xen/Arm: GICv3: Define remaining GIC registers " Ayan Kumar Halder
2022-11-29 14:57   ` Michal Orzel
2022-12-05 10:24     ` Ayan Kumar Halder
2022-11-28 15:56 ` [XEN v4 10/11] xen/Arm: GICv3: Define macros to read/write 64 bit Ayan Kumar Halder
2022-12-03 20:37   ` Julien Grall
2022-11-28 15:56 ` [XEN v4 11/11] xen/Arm: GICv3: Enable GICv3 for AArch32 Ayan Kumar Halder
2022-11-29 15:02   ` Michal Orzel
2022-12-03 20:40   ` Julien Grall

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