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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v3 5/5] drm/i915/mtl: Hold forcewake and MCR lock over PPAT setup
Date: Wed, 30 Nov 2022 07:58:52 -0800	[thread overview]
Message-ID: <20221130155852.19601-1-matthew.d.roper@intel.com> (raw)
In-Reply-To: <Y4d76483JRj5d4RL@bala-ubuntu>

PPAT setup involves a series of multicast writes.  This can be optimized
slightly be acquiring forcewake and the steering lock just once for the
entire sequence.

v2:
 - We should use FW_REG_WRITE instead of FW_REG_READ.  (Bala)

Suggested-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gtt.c | 27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 2ba3983984b9..e37164a60d37 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -482,14 +482,25 @@ static void tgl_setup_private_ppat(struct intel_uncore *uncore)
 
 static void xehp_setup_private_ppat(struct intel_gt *gt)
 {
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(0), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(1), GEN8_PPAT_WC);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(2), GEN8_PPAT_WT);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(3), GEN8_PPAT_UC);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(4), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(5), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(6), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(7), GEN8_PPAT_WB);
+	enum forcewake_domains fw;
+	unsigned long flags;
+
+	fw = intel_uncore_forcewake_for_reg(gt->uncore, _MMIO(XEHP_PAT_INDEX(0).reg),
+					    FW_REG_WRITE);
+	intel_uncore_forcewake_get(gt->uncore, fw);
+
+	intel_gt_mcr_lock(gt, &flags);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(0), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(1), GEN8_PPAT_WC);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(2), GEN8_PPAT_WT);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(3), GEN8_PPAT_UC);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(4), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(5), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(6), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(7), GEN8_PPAT_WB);
+	intel_gt_mcr_unlock(gt, flags);
+
+	intel_uncore_forcewake_put(gt->uncore, fw);
 }
 
 static void icl_setup_private_ppat(struct intel_uncore *uncore)
-- 
2.38.1


WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 5/5] drm/i915/mtl: Hold forcewake and MCR lock over PPAT setup
Date: Wed, 30 Nov 2022 07:58:52 -0800	[thread overview]
Message-ID: <20221130155852.19601-1-matthew.d.roper@intel.com> (raw)
In-Reply-To: <Y4d76483JRj5d4RL@bala-ubuntu>

PPAT setup involves a series of multicast writes.  This can be optimized
slightly be acquiring forcewake and the steering lock just once for the
entire sequence.

v2:
 - We should use FW_REG_WRITE instead of FW_REG_READ.  (Bala)

Suggested-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gtt.c | 27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 2ba3983984b9..e37164a60d37 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -482,14 +482,25 @@ static void tgl_setup_private_ppat(struct intel_uncore *uncore)
 
 static void xehp_setup_private_ppat(struct intel_gt *gt)
 {
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(0), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(1), GEN8_PPAT_WC);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(2), GEN8_PPAT_WT);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(3), GEN8_PPAT_UC);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(4), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(5), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(6), GEN8_PPAT_WB);
-	intel_gt_mcr_multicast_write(gt, XEHP_PAT_INDEX(7), GEN8_PPAT_WB);
+	enum forcewake_domains fw;
+	unsigned long flags;
+
+	fw = intel_uncore_forcewake_for_reg(gt->uncore, _MMIO(XEHP_PAT_INDEX(0).reg),
+					    FW_REG_WRITE);
+	intel_uncore_forcewake_get(gt->uncore, fw);
+
+	intel_gt_mcr_lock(gt, &flags);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(0), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(1), GEN8_PPAT_WC);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(2), GEN8_PPAT_WT);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(3), GEN8_PPAT_UC);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(4), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(5), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(6), GEN8_PPAT_WB);
+	intel_gt_mcr_multicast_write_fw(gt, XEHP_PAT_INDEX(7), GEN8_PPAT_WB);
+	intel_gt_mcr_unlock(gt, flags);
+
+	intel_uncore_forcewake_put(gt->uncore, fw);
 }
 
 static void icl_setup_private_ppat(struct intel_uncore *uncore)
-- 
2.38.1


  reply	other threads:[~2022-11-30 15:59 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-28 23:30 [PATCH v2 0/5] i915: dedicated MCR locking and hardware semaphore Matt Roper
2022-11-28 23:30 ` [Intel-gfx] " Matt Roper
2022-11-28 23:30 ` [PATCH v2 1/5] drm/i915/gt: Correct kerneldoc for intel_gt_mcr_wait_for_reg() Matt Roper
2022-11-28 23:30   ` [Intel-gfx] " Matt Roper
2022-11-30 15:42   ` Balasubramani Vivekanandan
2022-11-30 15:42     ` [Intel-gfx] " Balasubramani Vivekanandan
2022-11-28 23:30 ` [PATCH v2 2/5] drm/i915/gt: Pass gt rather than uncore to lowest-level reads/writes Matt Roper
2022-11-28 23:30   ` [Intel-gfx] " Matt Roper
2022-11-30 15:43   ` Balasubramani Vivekanandan
2022-11-30 15:43     ` [Intel-gfx] " Balasubramani Vivekanandan
2022-11-28 23:30 ` [PATCH v2 3/5] drm/i915/gt: Add dedicated MCR lock Matt Roper
2022-11-28 23:30   ` [Intel-gfx] " Matt Roper
2022-11-30 15:45   ` Balasubramani Vivekanandan
2022-11-30 15:45     ` [Intel-gfx] " Balasubramani Vivekanandan
2022-11-28 23:30 ` [PATCH v2 4/5] drm/i915/mtl: Add hardware-level lock for steering Matt Roper
2022-11-28 23:30   ` [Intel-gfx] " Matt Roper
2022-12-02 14:46   ` Balasubramani Vivekanandan
2022-12-05  8:58   ` Tvrtko Ursulin
2022-12-05 15:52     ` Matt Roper
2022-12-05 18:16       ` Tvrtko Ursulin
2022-11-28 23:30 ` [PATCH v2 5/5] drm/i915/mtl: Hold forcewake and MCR lock over PPAT setup Matt Roper
2022-11-28 23:30   ` [Intel-gfx] " Matt Roper
2022-11-30 15:51   ` Balasubramani Vivekanandan
2022-11-30 15:51     ` [Intel-gfx] " Balasubramani Vivekanandan
2022-11-30 15:58     ` Matt Roper [this message]
2022-11-30 15:58       ` [Intel-gfx] [PATCH v3 " Matt Roper
2022-12-01  9:26       ` Balasubramani Vivekanandan
2022-12-01  9:26         ` [Intel-gfx] " Balasubramani Vivekanandan
2022-12-01 21:01         ` Matt Roper
2022-12-01 21:01           ` Matt Roper
2022-11-30 16:05     ` [PATCH v2 " Matt Roper
2022-11-30 16:05       ` [Intel-gfx] " Matt Roper
2022-11-29  0:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: dedicated MCR locking and hardware semaphore (rev2) Patchwork
2022-11-29  0:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-29  6:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-11-30 17:13   ` Matt Roper
2022-11-30 16:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: dedicated MCR locking and hardware semaphore (rev3) Patchwork
2022-11-30 16:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-11-30 22:40   ` Matt Roper

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