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From: Tomeu Vizoso <tomeu.vizoso@collabora.com>
To: unlisted-recipients:; (no To-header on input)
Cc: italonicola@collabora.com,
	Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Russell King <linux+etnaviv@armlinux.org.uk>,
	Christian Gmeiner <christian.gmeiner@gmail.com>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	etnaviv@lists.freedesktop.org (moderated list:DRM DRIVERS FOR
	VIVANTE GPU IP),
	dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR
	VIVANTE GPU IP), linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v6 7/8] drm/etnaviv: add HWDB entry for VIPNano-QI.7120.0055
Date: Fri,  2 Dec 2022 12:52:19 +0100	[thread overview]
Message-ID: <20221202115223.39051-8-tomeu.vizoso@collabora.com> (raw)
In-Reply-To: <20221202115223.39051-1-tomeu.vizoso@collabora.com>

This is a compute-only module marketed towards AI and vision
acceleration. This particular version can be found on the Amlogic A311D
SoC.

The feature bits are taken from the Khadas downstream kernel driver
6.4.4.3.310723AAA.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
index 44df273a5aae..66b8ad6c7d26 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
@@ -134,6 +134,37 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
 		.minor_features10 = 0x90044250,
 		.minor_features11 = 0x00000024,
 	},
+	{
+		.model = 0x8000,
+		.revision = 0x7120,
+		.product_id = 0x45080009,
+		.customer_id = 0x88,
+		.eco_id = 0,
+		.stream_count = 8,
+		.register_max = 64,
+		.thread_count = 256,
+		.shader_core_count = 1,
+		.vertex_cache_size = 16,
+		.vertex_output_buffer_size = 1024,
+		.pixel_pipes = 1,
+		.instruction_count = 512,
+		.num_constants = 320,
+		.buffer_size = 0,
+		.varyings_count = 16,
+		.features = 0xe0287cac,
+		.minor_features0 = 0xc1799eff,
+		.minor_features1 = 0xfefbfadb,
+		.minor_features2 = 0xeb9d6fbf,
+		.minor_features3 = 0xedfffced,
+		.minor_features4 = 0xd30dafc7,
+		.minor_features5 = 0x7b5ac333,
+		.minor_features6 = 0xfc8ee200,
+		.minor_features7 = 0x03fffa6f,
+		.minor_features8 = 0x00fe0ef0,
+		.minor_features9 = 0x0088003c,
+		.minor_features10 = 0x108048c0,
+		.minor_features11 = 0x00000010,
+	},
 };
 
 bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu)
-- 
2.38.1


WARNING: multiple messages have this Message-ID (diff)
From: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>,
	italonicola@collabora.com,
	"moderated list:DRM DRIVERS FOR VIVANTE GPU IP"
	<etnaviv@lists.freedesktop.org>,
	"open list:DRM DRIVERS FOR VIVANTE GPU IP"
	<dri-devel@lists.freedesktop.org>,
	open list <linux-kernel@vger.kernel.org>,
	Russell King <linux+etnaviv@armlinux.org.uk>
Subject: [PATCH v6 7/8] drm/etnaviv: add HWDB entry for VIPNano-QI.7120.0055
Date: Fri,  2 Dec 2022 12:52:19 +0100	[thread overview]
Message-ID: <20221202115223.39051-8-tomeu.vizoso@collabora.com> (raw)
In-Reply-To: <20221202115223.39051-1-tomeu.vizoso@collabora.com>

This is a compute-only module marketed towards AI and vision
acceleration. This particular version can be found on the Amlogic A311D
SoC.

The feature bits are taken from the Khadas downstream kernel driver
6.4.4.3.310723AAA.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
index 44df273a5aae..66b8ad6c7d26 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
@@ -134,6 +134,37 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
 		.minor_features10 = 0x90044250,
 		.minor_features11 = 0x00000024,
 	},
+	{
+		.model = 0x8000,
+		.revision = 0x7120,
+		.product_id = 0x45080009,
+		.customer_id = 0x88,
+		.eco_id = 0,
+		.stream_count = 8,
+		.register_max = 64,
+		.thread_count = 256,
+		.shader_core_count = 1,
+		.vertex_cache_size = 16,
+		.vertex_output_buffer_size = 1024,
+		.pixel_pipes = 1,
+		.instruction_count = 512,
+		.num_constants = 320,
+		.buffer_size = 0,
+		.varyings_count = 16,
+		.features = 0xe0287cac,
+		.minor_features0 = 0xc1799eff,
+		.minor_features1 = 0xfefbfadb,
+		.minor_features2 = 0xeb9d6fbf,
+		.minor_features3 = 0xedfffced,
+		.minor_features4 = 0xd30dafc7,
+		.minor_features5 = 0x7b5ac333,
+		.minor_features6 = 0xfc8ee200,
+		.minor_features7 = 0x03fffa6f,
+		.minor_features8 = 0x00fe0ef0,
+		.minor_features9 = 0x0088003c,
+		.minor_features10 = 0x108048c0,
+		.minor_features11 = 0x00000010,
+	},
 };
 
 bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu)
-- 
2.38.1


  parent reply	other threads:[~2022-12-02 11:53 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
2022-12-02 11:52 ` Tomeu Vizoso
2022-12-02 11:52 ` Tomeu Vizoso
2022-12-02 11:52 ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 2/8] dt-bindings: power: Add G12A NNA power domain Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 3/8] soc: amlogic: meson-pwrc: Add NNA power domain for A311D Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2023-01-02  9:53   ` Neil Armstrong
2023-01-02  9:53     ` Neil Armstrong
2023-01-02  9:53     ` Neil Armstrong
2023-01-02 10:17     ` Tomeu Vizoso
2023-01-02 10:17       ` Tomeu Vizoso
2023-01-02 10:17       ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 5/8] drm/etnaviv: Add nn_core_count to chip feature struct Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 6/8] drm/etnaviv: Warn when probing on NPUs Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52 ` Tomeu Vizoso [this message]
2022-12-02 11:52   ` [PATCH v6 7/8] drm/etnaviv: add HWDB entry for VIPNano-QI.7120.0055 Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-02 11:52   ` Tomeu Vizoso
2022-12-05  8:42   ` Neil Armstrong
2022-12-05  8:42     ` Neil Armstrong
2022-12-05  8:42     ` Neil Armstrong
2023-01-02 10:30 ` (subset) [PATCH v6 0/8] Support for the NPU in Vim3 Neil Armstrong
2023-01-02 10:30   ` Neil Armstrong
2023-01-02 10:30   ` Neil Armstrong
2023-01-02 10:30   ` Neil Armstrong
2023-01-02 10:33 ` Neil Armstrong
2023-01-02 10:33   ` Neil Armstrong
2023-01-02 10:33   ` Neil Armstrong
2023-01-02 10:33   ` Neil Armstrong
2023-01-02 10:39 ` Neil Armstrong
2023-01-02 10:39   ` Neil Armstrong
2023-01-02 10:39   ` Neil Armstrong
2023-01-02 10:39   ` Neil Armstrong

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