From: Robert Foss <robert.foss@linaro.org> To: robdclark@gmail.com, quic_abhinavk@quicinc.com, dmitry.baryshkov@linaro.org, sean@poorly.run, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, konrad.dybcio@somainline.org, quic_kalyant@quicinc.com, angelogioacchino.delregno@somainline.org, robert.foss@linaro.org, loic.poulain@linaro.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, vkoul@kernel.org, dianders@chromium.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Marek <jonathan@marek.ca>, vinod.koul@linaro.org, quic_jesszhan@quicinc.com, andersson@kernel.org Subject: [PATCH v3 01/11] dt-bindings: display: msm: Add qcom, sm8350-dpu binding Date: Mon, 5 Dec 2022 17:37:44 +0100 [thread overview] Message-ID: <20221205163754.221139-2-robert.foss@linaro.org> (raw) In-Reply-To: <20221205163754.221139-1-robert.foss@linaro.org> Mobile Display Subsystem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for DPU device tree bindings Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++++++++++++++++++ 1 file changed, 120 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml new file mode 100644 index 000000000000..120500395c9a --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8350 Display DPU + +maintainers: + - Robert Foss <robert.foss@linaro.org> + +$ref: /schemas/display/msm/dpu-common.yaml# + +properties: + compatible: + const: qcom,sm8350-dpu + + reg: + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for vbif register set + + reg-names: + items: + - const: mdp + - const: vbif + + clocks: + items: + - description: Display hf axi clock + - description: Display sf axi clock + - description: Display ahb clock + - description: Display lut clock + - description: Display core clock + - description: Display vsync clock + + clock-names: + items: + - const: bus + - const: nrt_bus + - const: iface + - const: lut + - const: core + - const: vsync + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sm8350.h> + #include <dt-bindings/clock/qcom,gcc-sm8350.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interconnect/qcom,sm8350.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + display-controller@ae01000 { + compatible = "qcom,sm8350-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&gcc GCC_DISP_SF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", + "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd SM8350_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-345000000 { + opp-hz = /bits/ 64 <345000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-460000000 { + opp-hz = /bits/ 64 <460000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; +... -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Robert Foss <robert.foss@linaro.org> To: robdclark@gmail.com, quic_abhinavk@quicinc.com, dmitry.baryshkov@linaro.org, sean@poorly.run, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, konrad.dybcio@somainline.org, quic_kalyant@quicinc.com, angelogioacchino.delregno@somainline.org, robert.foss@linaro.org, loic.poulain@linaro.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, vkoul@kernel.org, dianders@chromium.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Marek <jonathan@marek.ca>, vinod.koul@linaro.org, quic_jesszhan@quicinc.com, andersson@kernel.org Cc: Rob Herring <robh@kernel.org> Subject: [PATCH v3 01/11] dt-bindings: display: msm: Add qcom,sm8350-dpu binding Date: Mon, 5 Dec 2022 17:37:44 +0100 [thread overview] Message-ID: <20221205163754.221139-2-robert.foss@linaro.org> (raw) In-Reply-To: <20221205163754.221139-1-robert.foss@linaro.org> Mobile Display Subsystem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for DPU device tree bindings Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++++++++++++++++++ 1 file changed, 120 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml new file mode 100644 index 000000000000..120500395c9a --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8350 Display DPU + +maintainers: + - Robert Foss <robert.foss@linaro.org> + +$ref: /schemas/display/msm/dpu-common.yaml# + +properties: + compatible: + const: qcom,sm8350-dpu + + reg: + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for vbif register set + + reg-names: + items: + - const: mdp + - const: vbif + + clocks: + items: + - description: Display hf axi clock + - description: Display sf axi clock + - description: Display ahb clock + - description: Display lut clock + - description: Display core clock + - description: Display vsync clock + + clock-names: + items: + - const: bus + - const: nrt_bus + - const: iface + - const: lut + - const: core + - const: vsync + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sm8350.h> + #include <dt-bindings/clock/qcom,gcc-sm8350.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interconnect/qcom,sm8350.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + display-controller@ae01000 { + compatible = "qcom,sm8350-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&gcc GCC_DISP_SF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", + "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd SM8350_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-345000000 { + opp-hz = /bits/ 64 <345000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-460000000 { + opp-hz = /bits/ 64 <460000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; +... -- 2.34.1
next prev parent reply other threads:[~2022-12-05 16:38 UTC|newest] Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-05 16:37 [PATCH v3 00/11] Enable Display for SM8350 Robert Foss 2022-12-05 16:37 ` Robert Foss [this message] 2022-12-05 16:37 ` [PATCH v3 01/11] dt-bindings: display: msm: Add qcom,sm8350-dpu binding Robert Foss 2022-12-05 16:37 ` [PATCH v3 02/11] dt-bindings: display: msm: Add qcom, sm8350-mdss binding Robert Foss 2022-12-05 16:37 ` [PATCH v3 02/11] dt-bindings: display: msm: Add qcom,sm8350-mdss binding Robert Foss 2022-12-05 21:08 ` [PATCH v3 02/11] dt-bindings: display: msm: Add qcom, sm8350-mdss binding Rob Herring 2022-12-05 21:08 ` [PATCH v3 02/11] dt-bindings: display: msm: Add qcom,sm8350-mdss binding Rob Herring 2022-12-05 16:37 ` [PATCH v3 03/11] drm/msm/dpu: Add SM8350 to hw catalog Robert Foss 2022-12-05 16:43 ` Konrad Dybcio 2022-12-07 23:39 ` Dmitry Baryshkov 2022-12-07 23:42 ` Abhinav Kumar 2022-12-28 9:27 ` Robert Foss 2022-12-28 9:27 ` Robert Foss 2022-12-05 16:37 ` [PATCH v3 04/11] drm/msm/dpu: Add support for SM8350 Robert Foss 2022-12-07 23:40 ` Dmitry Baryshkov 2022-12-07 23:47 ` Abhinav Kumar 2022-12-05 16:37 ` [PATCH v3 05/11] drm/msm: " Robert Foss 2022-12-05 16:43 ` Konrad Dybcio 2022-12-07 23:50 ` Dmitry Baryshkov 2022-12-19 16:18 ` Robert Foss 2022-12-19 16:18 ` Robert Foss 2022-12-05 16:37 ` [PATCH v3 06/11] arm64: dts: qcom: sm8350: Add &tlmm gpio-line-names Robert Foss 2022-12-05 16:37 ` [PATCH v3 07/11] arm64: dts: qcom: sm8350: Remove mmxc power-domain-name Robert Foss 2022-12-05 16:37 ` [PATCH v3 08/11] arm64: dts: qcom: sm8350: Use 2 interconnect cells Robert Foss 2022-12-05 19:19 ` Georgi Djakov 2022-12-19 16:15 ` Robert Foss 2022-12-19 16:15 ` Robert Foss 2022-12-05 16:37 ` [PATCH v3 09/11] arm64: dts: qcom: sm8350: Add display system nodes Robert Foss 2022-12-05 16:43 ` Dmitry Baryshkov 2022-12-05 16:46 ` Krzysztof Kozlowski 2022-12-05 16:49 ` Konrad Dybcio 2022-12-05 16:37 ` [PATCH v3 10/11] arm64: dts: qcom: sm8350-hdk: Enable display & dsi nodes Robert Foss 2022-12-05 16:44 ` Dmitry Baryshkov 2022-12-19 16:11 ` Robert Foss 2022-12-19 16:11 ` Robert Foss 2022-12-05 16:37 ` [PATCH v3 11/11] arm64: dts: qcom: sm8350-hdk: Enable lt9611uxc dsi-hdmi bridge Robert Foss 2022-12-05 16:47 ` Krzysztof Kozlowski 2022-12-28 8:26 ` Robert Foss 2022-12-28 8:26 ` Robert Foss
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