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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Stephen Boyd <swboyd@chromium.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Bjorn Andersson <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Subject: [PATCH 1/3] drm/msm/dpu: handle UBWC 1.0 in dpu_hw_sspp_setup_format
Date: Wed,  7 Dec 2022 16:28:31 +0200	[thread overview]
Message-ID: <20221207142833.204193-2-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20221207142833.204193-1-dmitry.baryshkov@linaro.org>

Extend dpu_hw_sspp_setup_format() to also handle the UBWC 1.0 case.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 691c471b08c2..4246ab0b3bee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -310,7 +310,11 @@ static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe *ctx,
 			ctx->mdp->highest_bank_bit << 18);
 		switch (ctx->catalog->caps->ubwc_version) {
 		case DPU_HW_UBWC_VER_10:
-			/* TODO: UBWC v1 case */
+			fast_clear = fmt->alpha_enable ? BIT(31) : 0;
+			DPU_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL,
+					fast_clear | (ctx->mdp->ubwc_swizzle & 0x1) |
+					BIT(8) |
+					(ctx->mdp->highest_bank_bit << 4));
 			break;
 		case DPU_HW_UBWC_VER_20:
 			fast_clear = fmt->alpha_enable ? BIT(31) : 0;
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
	Bjorn Andersson <andersson@kernel.org>,
	dri-devel@lists.freedesktop.org,
	Stephen Boyd <swboyd@chromium.org>
Subject: [PATCH 1/3] drm/msm/dpu: handle UBWC 1.0 in dpu_hw_sspp_setup_format
Date: Wed,  7 Dec 2022 16:28:31 +0200	[thread overview]
Message-ID: <20221207142833.204193-2-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20221207142833.204193-1-dmitry.baryshkov@linaro.org>

Extend dpu_hw_sspp_setup_format() to also handle the UBWC 1.0 case.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 691c471b08c2..4246ab0b3bee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -310,7 +310,11 @@ static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe *ctx,
 			ctx->mdp->highest_bank_bit << 18);
 		switch (ctx->catalog->caps->ubwc_version) {
 		case DPU_HW_UBWC_VER_10:
-			/* TODO: UBWC v1 case */
+			fast_clear = fmt->alpha_enable ? BIT(31) : 0;
+			DPU_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL,
+					fast_clear | (ctx->mdp->ubwc_swizzle & 0x1) |
+					BIT(8) |
+					(ctx->mdp->highest_bank_bit << 4));
 			break;
 		case DPU_HW_UBWC_VER_20:
 			fast_clear = fmt->alpha_enable ? BIT(31) : 0;
-- 
2.35.1


  reply	other threads:[~2022-12-07 14:29 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-07 14:28 [PATCH 0/3] drm/msm/dpu: several fixes for UBWC setup Dmitry Baryshkov
2022-12-07 14:28 ` Dmitry Baryshkov
2022-12-07 14:28 ` Dmitry Baryshkov [this message]
2022-12-07 14:28   ` [PATCH 1/3] drm/msm/dpu: handle UBWC 1.0 in dpu_hw_sspp_setup_format Dmitry Baryshkov
2023-01-24 23:22   ` Abhinav Kumar
2023-01-24 23:22     ` Abhinav Kumar
2022-12-07 14:28 ` [PATCH 2/3] drm/msm/dpu: correct the UBWC version on sm6115 Dmitry Baryshkov
2022-12-07 14:28   ` Dmitry Baryshkov
2023-01-24 23:23   ` Abhinav Kumar
2023-01-24 23:23     ` Abhinav Kumar
2022-12-07 14:28 ` [PATCH 3/3] drm/msm/dpu: add missing ubwc_swizzle setting to catalog Dmitry Baryshkov
2022-12-07 14:28   ` Dmitry Baryshkov
2023-01-24 23:27   ` Abhinav Kumar
2023-01-24 23:27     ` Abhinav Kumar
2023-01-13 21:43 ` [PATCH 0/3] drm/msm/dpu: several fixes for UBWC setup Abhinav Kumar
2023-01-13 21:43   ` Abhinav Kumar
2023-01-15 14:06   ` Dmitry Baryshkov
2023-01-15 14:06     ` Dmitry Baryshkov
2023-01-26 19:00 ` Dmitry Baryshkov
2023-01-26 19:00   ` Dmitry Baryshkov

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