From: Mark Brown <broonie@kernel.org> To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Oleg Nesterov <oleg@redhat.com>, Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>, Alexandru Elisei <alexandru.elisei@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Oliver Upton <oliver.upton@linux.dev>, Shuah Khan <shuah@kernel.org> Cc: Alan Hayward <alan.hayward@arm.com>, Luis Machado <luis.machado@arm.com>, Szabolcs Nagy <szabolcs.nagy@arm.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org> Subject: [PATCH v4 10/21] arm64/sme: Implement context switching for ZT0 Date: Mon, 16 Jan 2023 16:04:45 +0000 [thread overview] Message-ID: <20221208-arm64-sme2-v4-10-f2fa0aef982f@kernel.org> (raw) In-Reply-To: <20221208-arm64-sme2-v4-0-f2fa0aef982f@kernel.org> When the system supports SME2 the ZT0 register must be context switched as part of the floating point state. This register is stored immediately after ZA in memory and is only accessible when PSTATE.ZA is set so we handle it in the same functions we use to save and restore ZA. Signed-off-by: Mark Brown <broonie@kernel.org> --- arch/arm64/include/asm/fpsimd.h | 4 ++-- arch/arm64/kernel/entry-fpsimd.S | 30 ++++++++++++++++++++---------- arch/arm64/kernel/fpsimd.c | 6 ++++-- 3 files changed, 26 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 8df769c20677..0ce4465644fc 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -119,8 +119,8 @@ extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1); extern unsigned int sve_get_vl(void); extern void sve_set_vq(unsigned long vq_minus_1); extern void sme_set_vq(unsigned long vq_minus_1); -extern void za_save_state(void *state); -extern void za_load_state(void const *state); +extern void sme_save_state(void *state, int zt); +extern void sme_load_state(void const *state, int zt); struct arm64_cpu_capabilities; extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 229436f33df5..6325db1a2179 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -100,25 +100,35 @@ SYM_FUNC_START(sme_set_vq) SYM_FUNC_END(sme_set_vq) /* - * Save the SME state + * Save the ZA and ZT state * * x0 - pointer to buffer for state + * x1 - number of ZT registers to save */ -SYM_FUNC_START(za_save_state) - _sme_rdsvl 1, 1 // x1 = VL/8 - sme_save_za 0, x1, 12 +SYM_FUNC_START(sme_save_state) + _sme_rdsvl 2, 1 // x2 = VL/8 + sme_save_za 0, x2, 12 // Leaves x0 pointing to the end of ZA + + cbz x1, 1f + _str_zt 0 +1: ret -SYM_FUNC_END(za_save_state) +SYM_FUNC_END(sme_save_state) /* - * Load the SME state + * Load the ZA and ZT state * * x0 - pointer to buffer for state + * x1 - number of ZT registers to save */ -SYM_FUNC_START(za_load_state) - _sme_rdsvl 1, 1 // x1 = VL/8 - sme_load_za 0, x1, 12 +SYM_FUNC_START(sme_load_state) + _sme_rdsvl 2, 1 // x2 = VL/8 + sme_load_za 0, x2, 12 // Leaves x0 pointing to the end of ZA + + cbz x1, 1f + _ldr_zt 0 +1: ret -SYM_FUNC_END(za_load_state) +SYM_FUNC_END(sme_load_state) #endif /* CONFIG_ARM64_SME */ diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index 717ae4aaa021..cec8b43e7888 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -429,7 +429,8 @@ static void task_fpsimd_load(void) write_sysreg_s(current->thread.svcr, SYS_SVCR); if (thread_za_enabled(¤t->thread)) - za_load_state(current->thread.sme_state); + sme_load_state(current->thread.sme_state, + system_supports_sme2()); if (thread_sm_enabled(¤t->thread)) restore_ffr = system_supports_fa64(); @@ -490,7 +491,8 @@ static void fpsimd_save(void) *svcr = read_sysreg_s(SYS_SVCR); if (*svcr & SVCR_ZA_MASK) - za_save_state(last->sme_state); + sme_save_state(last->sme_state, + system_supports_sme2()); /* If we are in streaming mode override regular SVE. */ if (*svcr & SVCR_SM_MASK) { -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org> To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Oleg Nesterov <oleg@redhat.com>, Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>, Alexandru Elisei <alexandru.elisei@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Oliver Upton <oliver.upton@linux.dev>, Shuah Khan <shuah@kernel.org> Cc: Alan Hayward <alan.hayward@arm.com>, Luis Machado <luis.machado@arm.com>, Szabolcs Nagy <szabolcs.nagy@arm.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org> Subject: [PATCH v4 10/21] arm64/sme: Implement context switching for ZT0 Date: Mon, 16 Jan 2023 16:04:45 +0000 [thread overview] Message-ID: <20221208-arm64-sme2-v4-10-f2fa0aef982f@kernel.org> (raw) In-Reply-To: <20221208-arm64-sme2-v4-0-f2fa0aef982f@kernel.org> When the system supports SME2 the ZT0 register must be context switched as part of the floating point state. This register is stored immediately after ZA in memory and is only accessible when PSTATE.ZA is set so we handle it in the same functions we use to save and restore ZA. Signed-off-by: Mark Brown <broonie@kernel.org> --- arch/arm64/include/asm/fpsimd.h | 4 ++-- arch/arm64/kernel/entry-fpsimd.S | 30 ++++++++++++++++++++---------- arch/arm64/kernel/fpsimd.c | 6 ++++-- 3 files changed, 26 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 8df769c20677..0ce4465644fc 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -119,8 +119,8 @@ extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1); extern unsigned int sve_get_vl(void); extern void sve_set_vq(unsigned long vq_minus_1); extern void sme_set_vq(unsigned long vq_minus_1); -extern void za_save_state(void *state); -extern void za_load_state(void const *state); +extern void sme_save_state(void *state, int zt); +extern void sme_load_state(void const *state, int zt); struct arm64_cpu_capabilities; extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 229436f33df5..6325db1a2179 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -100,25 +100,35 @@ SYM_FUNC_START(sme_set_vq) SYM_FUNC_END(sme_set_vq) /* - * Save the SME state + * Save the ZA and ZT state * * x0 - pointer to buffer for state + * x1 - number of ZT registers to save */ -SYM_FUNC_START(za_save_state) - _sme_rdsvl 1, 1 // x1 = VL/8 - sme_save_za 0, x1, 12 +SYM_FUNC_START(sme_save_state) + _sme_rdsvl 2, 1 // x2 = VL/8 + sme_save_za 0, x2, 12 // Leaves x0 pointing to the end of ZA + + cbz x1, 1f + _str_zt 0 +1: ret -SYM_FUNC_END(za_save_state) +SYM_FUNC_END(sme_save_state) /* - * Load the SME state + * Load the ZA and ZT state * * x0 - pointer to buffer for state + * x1 - number of ZT registers to save */ -SYM_FUNC_START(za_load_state) - _sme_rdsvl 1, 1 // x1 = VL/8 - sme_load_za 0, x1, 12 +SYM_FUNC_START(sme_load_state) + _sme_rdsvl 2, 1 // x2 = VL/8 + sme_load_za 0, x2, 12 // Leaves x0 pointing to the end of ZA + + cbz x1, 1f + _ldr_zt 0 +1: ret -SYM_FUNC_END(za_load_state) +SYM_FUNC_END(sme_load_state) #endif /* CONFIG_ARM64_SME */ diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index 717ae4aaa021..cec8b43e7888 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -429,7 +429,8 @@ static void task_fpsimd_load(void) write_sysreg_s(current->thread.svcr, SYS_SVCR); if (thread_za_enabled(¤t->thread)) - za_load_state(current->thread.sme_state); + sme_load_state(current->thread.sme_state, + system_supports_sme2()); if (thread_sm_enabled(¤t->thread)) restore_ffr = system_supports_fa64(); @@ -490,7 +491,8 @@ static void fpsimd_save(void) *svcr = read_sysreg_s(SYS_SVCR); if (*svcr & SVCR_ZA_MASK) - za_save_state(last->sme_state); + sme_save_state(last->sme_state, + system_supports_sme2()); /* If we are in streaming mode override regular SVE. */ if (*svcr & SVCR_SM_MASK) { -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-16 16:10 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-16 16:04 [PATCH v4 00/21] arm64/sme: Support SME 2 and SME 2.1 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 01/21] arm64/sme: Rename za_state to sme_state Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 02/21] arm64: Document boot requirements for SME 2 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 03/21] arm64/sysreg: Update system registers for SME 2 and 2.1 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 04/21] arm64/sme: Document SME 2 and SME 2.1 ABI Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 05/21] arm64/esr: Document ISS for ZT0 being disabled Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 06/21] arm64/sme: Manually encode ZT0 load and store instructions Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 07/21] arm64/sme: Enable host kernel to access ZT0 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-02-06 9:31 ` Marc Zyngier 2023-02-06 9:31 ` Marc Zyngier 2023-02-06 13:02 ` Mark Brown 2023-02-06 13:02 ` Mark Brown 2023-02-06 16:44 ` Catalin Marinas 2023-02-06 16:44 ` Catalin Marinas 2023-01-16 16:04 ` [PATCH v4 08/21] arm64/sme: Add basic enumeration for SME2 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 09/21] arm64/sme: Provide storage for ZT0 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` Mark Brown [this message] 2023-01-16 16:04 ` [PATCH v4 10/21] arm64/sme: Implement context switching " Mark Brown 2023-01-16 16:04 ` [PATCH v4 11/21] arm64/sme: Implement signal handling for ZT Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 12/21] arm64/sme: Implement ZT0 ptrace support Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 13/21] arm64/sme: Add hwcaps for SME 2 and 2.1 features Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 14/21] kselftest/arm64: Add a stress test program for ZT0 Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 15/21] kselftest/arm64: Cover ZT in the FP stress test Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 16/21] kselftest/arm64: Enumerate SME2 in the signal test utility code Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 17/21] kselftest/arm64: Teach the generic signal context validation about ZT Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 18/21] kselftest/arm64: Add test coverage for ZT register signal frames Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 19/21] kselftest/arm64: Add SME2 coverage to syscall-abi Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 20/21] kselftest/arm64: Add coverage of the ZT ptrace regset Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-16 16:04 ` [PATCH v4 21/21] kselftest/arm64: Add coverage of SME 2 and 2.1 hwcaps Mark Brown 2023-01-16 16:04 ` Mark Brown 2023-01-20 16:59 ` [PATCH v4 00/21] arm64/sme: Support SME 2 and SME 2.1 Catalin Marinas 2023-01-20 16:59 ` Catalin Marinas
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