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From: Witold Sadowski <wsadowski@marvell.com>
To: <broonie@kernel.org>
Cc: <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <jpawar@cadence.com>,
	<pthombar@cadence.com>, <konrad@cadence.com>,
	<wbartczak@marvell.com>, <wzmuda@marvell.com>,
	<wsadowski@marvell.com>
Subject: [PATCH 3/7] spi: cadence: Add polling mode support
Date: Mon, 19 Dec 2022 06:42:50 -0800	[thread overview]
Message-ID: <20221219144254.20883-4-wsadowski@marvell.com> (raw)
In-Reply-To: <20221219144254.20883-1-wsadowski@marvell.com>

If IRQ is not configured, switch driver to polling
mode instead of returning with error.
Code is using SDMA interrupt flag to determine
SDMA operation status, and stig ready flag to
determine stig engine readiness.

Signed-off-by: Witold Sadowski <wsadowski@marvell.com>
Reviewed-by: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
---
 drivers/spi/spi-cadence-xspi.c | 66 +++++++++++++++++++++++++++-------
 1 file changed, 53 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c
index 91db3c973167..25db0d55d5ef 100644
--- a/drivers/spi/spi-cadence-xspi.c
+++ b/drivers/spi/spi-cadence-xspi.c
@@ -190,6 +190,9 @@
 		((op)->data.dir == SPI_MEM_DATA_IN) ? \
 		CDNS_XSPI_STIG_CMD_DIR_READ : CDNS_XSPI_STIG_CMD_DIR_WRITE))
 
+#define CDNS_XSPI_POLL_TIMEOUT_US	1000
+#define CDNS_XSPI_POLL_DELAY_US	10
+
 enum cdns_xspi_stig_instr_type {
 	CDNS_XSPI_STIG_INSTR_TYPE_0,
 	CDNS_XSPI_STIG_INSTR_TYPE_1,
@@ -293,6 +296,9 @@ static void cdns_xspi_set_interrupts(struct cdns_xspi_dev *cdns_xspi,
 {
 	u32 intr_enable;
 
+	if (!cdns_xspi->irq)
+		return;
+
 	intr_enable = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_ENABLE_REG);
 	if (enabled)
 		intr_enable |= CDNS_XSPI_INTR_MASK;
@@ -345,6 +351,28 @@ static void cdns_xspi_sdma_handle(struct cdns_xspi_dev *cdns_xspi)
 	}
 }
 
+bool cdns_xspi_stig_ready(struct cdns_xspi_dev *cdns_xspi)
+{
+	u32 ctrl_stat;
+
+	return readl_relaxed_poll_timeout
+		(cdns_xspi->iobase + CDNS_XSPI_CTRL_STATUS_REG,
+		ctrl_stat,
+		((ctrl_stat & BIT(3)) == 0),
+		CDNS_XSPI_POLL_DELAY_US, CDNS_XSPI_POLL_TIMEOUT_US);
+}
+
+bool cdns_xspi_sdma_ready(struct cdns_xspi_dev *cdns_xspi)
+{
+	u32 ctrl_stat;
+
+	return readl_relaxed_poll_timeout
+		(cdns_xspi->iobase + CDNS_XSPI_INTR_STATUS_REG,
+		ctrl_stat,
+		(ctrl_stat & CDNS_XSPI_SDMA_TRIGGER),
+		CDNS_XSPI_POLL_DELAY_US, CDNS_XSPI_POLL_TIMEOUT_US);
+}
+
 static int cdns_xspi_send_stig_command(struct cdns_xspi_dev *cdns_xspi,
 				       const struct spi_mem_op *op,
 				       bool data_phase)
@@ -385,16 +413,26 @@ static int cdns_xspi_send_stig_command(struct cdns_xspi_dev *cdns_xspi,
 
 		cdns_xspi_trigger_command(cdns_xspi, cmd_regs);
 
-		wait_for_completion(&cdns_xspi->sdma_complete);
-		if (cdns_xspi->sdma_error) {
-			cdns_xspi_set_interrupts(cdns_xspi, false);
-			return -EIO;
+		if (cdns_xspi->irq) {
+			wait_for_completion(&cdns_xspi->sdma_complete);
+			if (cdns_xspi->sdma_error) {
+				cdns_xspi_set_interrupts(cdns_xspi, false);
+				return -EIO;
+			}
+		} else {
+			if (cdns_xspi_sdma_ready(cdns_xspi))
+				return -EIO;
 		}
 		cdns_xspi_sdma_handle(cdns_xspi);
 	}
 
-	wait_for_completion(&cdns_xspi->cmd_complete);
-	cdns_xspi_set_interrupts(cdns_xspi, false);
+	if (cdns_xspi->irq) {
+		wait_for_completion(&cdns_xspi->cmd_complete);
+		cdns_xspi_set_interrupts(cdns_xspi, false);
+	} else {
+		if (cdns_xspi_stig_ready(cdns_xspi))
+			return -EIO;
+	}
 
 	cmd_status = cdns_xspi_check_command_status(cdns_xspi);
 	if (cmd_status)
@@ -580,13 +618,15 @@ static int cdns_xspi_probe(struct platform_device *pdev)
 
 	cdns_xspi->irq = platform_get_irq(pdev, 0);
 	if (cdns_xspi->irq < 0)
-		return -ENXIO;
-
-	ret = devm_request_irq(dev, cdns_xspi->irq, cdns_xspi_irq_handler,
-			       IRQF_SHARED, pdev->name, cdns_xspi);
-	if (ret) {
-		dev_err(dev, "Failed to request IRQ: %d\n", cdns_xspi->irq);
-		return ret;
+		cdns_xspi->irq = 0;
+
+	if (cdns_xspi->irq) {
+		ret = devm_request_irq(dev, cdns_xspi->irq, cdns_xspi_irq_handler,
+				IRQF_SHARED, pdev->name, cdns_xspi);
+		if (ret) {
+			dev_err(dev, "Failed to request IRQ: %d\n", cdns_xspi->irq);
+			return ret;
+		}
 	}
 
 	cdns_xspi_print_phy_config(cdns_xspi);
-- 
2.17.1


  parent reply	other threads:[~2022-12-19 14:43 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-19 14:42 [PATCH 0/7] Support for Marvell modifications for Cadence XSPI Witold Sadowski
2022-12-19 14:42 ` [PATCH 1/7] spi: cadence: Fix busy cycles calculation Witold Sadowski
2022-12-19 14:42 ` [PATCH 2/7] spi: cadence: Change dt-bindings documentation for Cadence XSPI controller Witold Sadowski
2022-12-20 14:08   ` Krzysztof Kozlowski
2022-12-19 14:42 ` Witold Sadowski [this message]
2022-12-19 18:05   ` [PATCH 3/7] spi: cadence: Add polling mode support kernel test robot
2022-12-19 14:42 ` [PATCH 4/7] spi: cadence: Change dt-bindings documentation for Cadence XSPI controller Witold Sadowski
2022-12-19 18:14   ` Mark Brown
2022-12-19 21:22   ` Rob Herring
2022-12-20 14:09   ` Krzysztof Kozlowski
2024-04-29 15:13     ` [EXT] " Witold Sadowski
2022-12-19 14:42 ` [PATCH 5/7] spi: cadence: Add read access size switch Witold Sadowski
2022-12-19 18:16   ` Mark Brown
2024-04-29 15:40     ` [EXT] " Witold Sadowski
2022-12-19 20:26   ` kernel test robot
2022-12-19 14:42 ` [PATCH 6/7] spi: cadence: Add Marvell IP modification changes Witold Sadowski
2022-12-19 18:27   ` Mark Brown
2024-04-29 15:27     ` [EXT] " Witold Sadowski
2022-12-20 14:12   ` Krzysztof Kozlowski
2024-04-29 15:10     ` [EXT] " Witold Sadowski
2022-12-19 14:42 ` [PATCH 7/7] spi: cadence: Force single modebyte Witold Sadowski
2022-12-19 18:28   ` Mark Brown
2022-12-27 11:57 ` (subset) [PATCH 0/7] Support for Marvell modifications for Cadence XSPI Mark Brown

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