All of lore.kernel.org
 help / color / mirror / Atom feed
From: Amit Daniel Kachhap <amit.kachhap@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Amit Daniel Kachhap <amit.kachhap@arm.com>
Subject: [PATCH v2 5/7] arm64: Add compat hwcap I8MM
Date: Wed, 11 Jan 2023 11:07:04 +0530	[thread overview]
Message-ID: <20230111053706.13994-6-amit.kachhap@arm.com> (raw)
In-Reply-To: <20230111053706.13994-1-amit.kachhap@arm.com>

This hwcap was added earlier for 32-bit native arm kernel by commit
956ca3a4eb81 ("ARM: 9272/1: vfp: Add hwcap for FEAT_AA32I8MM") and hence
the corresponding changes added in 32-bit compat arm64 kernel for similar
user interfaces.

Int8 matrix multiplication is a feature (FEAT_AA32I8MM) present in AArch32
state of Armv8 and is identified by ISAR6.I8MM register. Similar
feature(FEAT_I8MM) exist for AArch64 state and is already advertised in
arm64 kernel.

Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
---
 arch/arm64/include/asm/hwcap.h | 1 +
 arch/arm64/kernel/cpufeature.c | 3 ++-
 arch/arm64/kernel/cpuinfo.c    | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 268aa0e5ec06..da7687efd1ae 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -36,6 +36,7 @@
 #define COMPAT_HWCAP_ASIMDDP	(1 << 24)
 #define COMPAT_HWCAP_ASIMDFHM	(1 << 25)
 #define COMPAT_HWCAP_ASIMDBF16	(1 << 26)
+#define COMPAT_HWCAP_I8MM	(1 << 27)
 
 #define COMPAT_HWCAP2_AES	(1 << 0)
 #define COMPAT_HWCAP2_PMULL	(1 << 1)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 1533107a7ad5..46998bbba6ff 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -529,7 +529,7 @@ static const struct arm64_ftr_bits ftr_id_mmfr5[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_isar6[] = {
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_EL1_I8MM_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_EL1_I8MM_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_EL1_BF16_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_EL1_SPECRES_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR6_EL1_SB_SHIFT, 4, 0),
@@ -2876,6 +2876,7 @@ static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = {
 	HWCAP_CAP(SYS_ID_ISAR6_EL1, ID_ISAR6_EL1_DP_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_ASIMDDP),
 	HWCAP_CAP(SYS_ID_ISAR6_EL1, ID_ISAR6_EL1_FHM_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_ASIMDFHM),
 	HWCAP_CAP(SYS_ID_ISAR6_EL1, ID_ISAR6_EL1_BF16_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_ASIMDBF16),
+	HWCAP_CAP(SYS_ID_ISAR6_EL1, ID_ISAR6_EL1_I8MM_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_I8MM),
 #endif
 	{},
 };
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 50cfd808b80c..2af73bc14775 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -151,6 +151,7 @@ static const char *const compat_hwcap_str[] = {
 	[COMPAT_KERNEL_HWCAP(ASIMDDP)]	= "asimddp",
 	[COMPAT_KERNEL_HWCAP(ASIMDFHM)]	= "asimdfhm",
 	[COMPAT_KERNEL_HWCAP(ASIMDBF16)] = "asimdbf16",
+	[COMPAT_KERNEL_HWCAP(I8MM)]	= "i8mm",
 };
 
 #define COMPAT_KERNEL_HWCAP2(x)	const_ilog2(COMPAT_HWCAP2_ ## x)
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-01-11  5:39 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-11  5:36 [PATCH v2 0/7] arm64: Expose compat Armv8 AArch32 features Amit Daniel Kachhap
2023-01-11  5:37 ` [PATCH v2 1/7] arm64: Add compat hwcap FPHP and ASIMDHP Amit Daniel Kachhap
2023-01-11 20:07   ` Mark Brown
2023-01-11  5:37 ` [PATCH v2 2/7] arm64: Add compat hwcap ASIMDDP Amit Daniel Kachhap
2023-01-11 20:11   ` Mark Brown
2023-01-11  5:37 ` [PATCH v2 3/7] arm64: Add compat hwcap ASIMDFHM Amit Daniel Kachhap
2023-01-19 15:02   ` Mark Brown
2023-01-11  5:37 ` [PATCH v2 4/7] arm64: Add compat hwcap ASIMDBF16 Amit Daniel Kachhap
2023-01-19 15:03   ` Mark Brown
2023-01-11  5:37 ` Amit Daniel Kachhap [this message]
2023-01-19 15:04   ` [PATCH v2 5/7] arm64: Add compat hwcap I8MM Mark Brown
2023-01-11  5:37 ` [PATCH v2 6/7] arm64: Add compat hwcap SB Amit Daniel Kachhap
2023-01-19 15:06   ` Mark Brown
2023-01-11  5:37 ` [PATCH v2 7/7] arm64: Add compat hwcap SSBS Amit Daniel Kachhap
2023-01-19 15:06   ` Mark Brown
2023-01-11 13:49 ` [PATCH v2 0/7] arm64: Expose compat Armv8 AArch32 features Mark Brown
2023-01-12  5:12   ` Amit Daniel Kachhap
2023-01-20 16:58 ` Catalin Marinas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230111053706.13994-6-amit.kachhap@arm.com \
    --to=amit.kachhap@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.