[PATCH v6 00/11] intel-m10-bmc: Split BMC to core and SPI parts & add PMCI+N6000 support

["Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>]

Hi all,

Here are the patches for MAX 10 BMC core/SPI interface split and
addition of the PMCI interface. There are a few supporting rearrangement
patches prior to the actual split.

I had to move flash MUX control back from sec driver to PMCI because
there will be other drivers that also read flash (e.g., log driver). It
also lead to realization that the flash_mutex wasn't enough to handle
reads during an update (erase + write) but the update has to be tracked
independent of just the write itself. BMC will manage flash MUX at that
point and reads got -ETIMEDOUT in v5 when update was already in
progress but not yet doing write. In v6, the reads return -EBUSY during
an update. These changes impact the last patch of the series.

As both Yilun and Lee seemed to find it better to not put the register
defines into the .c files, I've left them into header file starting from
v6 and just renamed them such that it's more obvious the define relates
to one board type.

The patch set is based on top of 60ce26d10e58 ("fpga: m10bmc-sec: Fix
probe rollback").

v6:
- Move flash MUX control back to PMCI driver (other drivers besides
  secure update such as log driver depend on it while reading the flash)
- Track updates independent of write itself using bool flash_busy
- Return -EBUSY for flash reads during update (erase+write)
- Add type specific ops & ->rsu_status() into the sec update driver
  to handle RSU status in different registers inside the driver.
- Corrected handling of unaligned tail in bulk read
- Rename raw doorbell parameters to doorbell_reg
- Drop unnecessary PMCI telemetry reg defines
- Keep defines include/linux/mfd/intel-m10-bmc.h
- More register defines with N3000/N6000 prefix
- Define flash timeouts only once, remove the other
- Add correct includes for linux/mfd/intel-m10-bmc.h
- Simplified rename variable patch tags

v5:
- Explain flash MUX rollback path in commit message
- Fix RSU status field register location

v4:
- Use board type for naming defines & structs
- Set .reg_read/write and call devm_regmap_init() directly
- Rename indirect_bus_*() funcs to indirect_*()
- Move indirect code into intel-m10-bmc-pmci so funcs can be static
- Drop module licence  GPL v2 - GPL change

v3:
- Move regmap indirect into BMC PMCI module
        - Get rid of "generalization" of cmd offsets and values, back to v1 #defines
        - Tweak Kconfig & Makefile
        - Rename intel-m10-bmc-pmci to intel-m10-bmc-pmci-main
- Rework sec update read/write paths
        - Sec update driver code effectively uses the SPI side code from v2
        - Rename m10bmc_sec_write() to m10bmc_sec_fw_write()
        - Rename flash_ops to flash_bulk_ops and make them optional
        - Move flash MUX and flash_mutex handling into sec update driver
        - Prevent simultaneous flash bulk write & read using flash_mutex
        - Keep M10BMC_STAGING_BASE in header (now used in the sec update code)
- Rebased on top of leak fix "fpga: m10bmc-sec: Fix probe rollback"

v2:
- Drop type from mfd side, the platform info takes care of differentation
- Explain introducing ->info to struct m10bmc in commit message (belongs logically there)
- Intro PMCI better
- Improve naming
        - Rename M10BMC_PMCI_FLASH_CTRL to M10BMC_PMCI_FLASH_MUX_CTRL
        - Use m10bmc_pmci/M10BMC_PMCI prefix consistently
        - Use M10BMC_SPI prefix for SPI related defines
        - Newly added stuff gets m10bmc_spi prefix
- Removed dev from struct m10bmc_pmci_device
- Rename "n_offset" variable to "offset" in PMCI flash ops
- Always issue idle command in regmap indirect to clear RD/WR/ACK bits
- Handle stride misaligned sizes in flash read/write ops

Ilpo Järvinen (11):
  mfd: intel-m10-bmc: Add missing includes to header
  mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
  mfd: intel-m10-bmc: Rename the local variables
  mfd: intel-m10-bmc: Split into core and spi specific parts
  mfd: intel-m10-bmc: Support multiple CSR register layouts
  fpga: intel-m10-bmc: Rework flash read/write
  mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
  fpga: m10bmc-sec: Create helpers for rsu status/progress checks
  fpga: m10bmc-sec: Make rsu status type specific
  mfd: intel-m10-bmc: Add PMCI driver
  fpga: m10bmc-sec: Add support for N6000

 .../ABI/testing/sysfs-driver-intel-m10-bmc    |   8 +-
 MAINTAINERS                                   |   2 +-
 drivers/fpga/Kconfig                          |   2 +-
 drivers/fpga/intel-m10-bmc-sec-update.c       | 415 ++++++++++------
 drivers/hwmon/Kconfig                         |   2 +-
 drivers/mfd/Kconfig                           |  32 +-
 drivers/mfd/Makefile                          |   5 +-
 drivers/mfd/intel-m10-bmc-core.c              | 122 +++++
 drivers/mfd/intel-m10-bmc-pmci.c              | 455 ++++++++++++++++++
 drivers/mfd/intel-m10-bmc-spi.c               | 168 +++++++
 drivers/mfd/intel-m10-bmc.c                   | 238 ---------
 include/linux/mfd/intel-m10-bmc.h             | 205 ++++++--
 12 files changed, 1221 insertions(+), 433 deletions(-)
 create mode 100644 drivers/mfd/intel-m10-bmc-core.c
 create mode 100644 drivers/mfd/intel-m10-bmc-pmci.c
 create mode 100644 drivers/mfd/intel-m10-bmc-spi.c
 delete mode 100644 drivers/mfd/intel-m10-bmc.c

-- 
2.30.2