From: Brad Larson <brad@pensando.io> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, andy.shevchenko@gmail.com, arnd@arndb.de, brad@pensando.io, blarson@amd.com, brendan.higgins@linux.dev, briannorris@chromium.org, brijeshkumar.singh@amd.com, catalin.marinas@arm.com, davidgow@google.com, gsomlo@gmail.com, gerg@linux-m68k.org, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, lee.jones@linaro.org, broonie@kernel.org, yamada.masahiro@socionext.com, p.zabel@pengutronix.de, piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, will@kernel.org, devicetree@vger.kernel.org Subject: [PATCH v9 11/15] spi: dw: Add support for AMD Pensando Elba SoC Date: Wed, 18 Jan 2023 19:39:14 -0800 [thread overview] Message-ID: <20230119033918.44117-12-blarson@amd.com> (raw) In-Reply-To: <20230119033918.44117-1-blarson@amd.com> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller with device specific chip-select control. The Elba SoC provides four chip-selects where the native DW IP supports two chip-selects. The Elba DW_SPI instance has two native CS signals that are always overridden. Signed-off-by: Brad Larson <blarson@amd.com> --- Changes since v6: - Add use of macros GENMASK() and BIT() - Change ELBA_SPICS_SHIFT() to ELBA_SPICS_OFFSET() --- drivers/spi/spi-dw-mmio.c | 78 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 26c40ea6dd12..9b6f876227e8 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -53,6 +53,24 @@ struct dw_spi_mscc { void __iomem *spi_mst; /* Not sparx5 */ }; +struct dw_spi_elba { + struct regmap *syscon; +}; + +/* + * Elba SoC does not use ssi, pin override is used for cs 0,1 and + * gpios for cs 2,3 as defined in the device tree. + * + * cs: | 1 0 + * bit: |---3-------2-------1-------0 + * | cs1 cs1_ovr cs0 cs0_ovr + */ +#define ELBA_SPICS_REG 0x2468 +#define ELBA_SPICS_OFFSET(cs) ((cs) << 1) +#define ELBA_SPICS_MASK(cs) (GENMASK(1, 0) << ELBA_SPICS_OFFSET(cs)) +#define ELBA_SPICS_SET(cs, val) \ + ((((val) << 1) | BIT(0)) << ELBA_SPICS_OFFSET(cs)) + /* * The Designware SPI controller (referred to as master in the documentation) * automatically deasserts chip select when the tx fifo is empty. The chip @@ -237,6 +255,65 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, return 0; } +static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int cs, int enable) +{ + regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs), + ELBA_SPICS_SET(cs, enable)); + +} + +static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable) +{ + struct dw_spi *dws = spi_master_get_devdata(spi->master); + struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); + struct dw_spi_elba *dwselba = dwsmmio->priv; + u8 cs; + + cs = spi->chip_select; + if (cs < 2) + dw_spi_elba_override_cs(dwselba, spi->chip_select, enable); + + /* + * The DW SPI controller needs a native CS bit selected to start + * the serial engine. + */ + spi->chip_select = 0; + dw_spi_set_cs(spi, enable); + spi->chip_select = cs; +} + +static int dw_spi_elba_init(struct platform_device *pdev, + struct dw_spi_mmio *dwsmmio) +{ + const char *syscon_name = "amd,pensando-elba-syscon"; + struct device_node *np = pdev->dev.of_node; + struct dw_spi_elba *dwselba; + struct device_node *node; + struct regmap *regmap; + + node = of_parse_phandle(np, syscon_name, 0); + if (!node) { + dev_err(&pdev->dev, "failed to find %s\n", syscon_name); + return -ENODEV; + } + + regmap = syscon_node_to_regmap(node); + if (IS_ERR(regmap)) { + dev_err(&pdev->dev, "syscon regmap lookup failed\n"); + return PTR_ERR(regmap); + } + + dwselba = devm_kzalloc(&pdev->dev, sizeof(*dwselba), GFP_KERNEL); + if (!dwselba) + return -ENOMEM; + + dwselba->syscon = regmap; + dwsmmio->priv = dwselba; + dwsmmio->dws.set_cs = dw_spi_elba_set_cs; + + return 0; +} + static int dw_spi_mmio_probe(struct platform_device *pdev) { int (*init_func)(struct platform_device *pdev, @@ -352,6 +429,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = { { .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init}, { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init}, { .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init}, + { .compatible = "amd,pensando-elba-spi", .data = dw_spi_elba_init}, { /* end of table */} }; MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match); -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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From: Brad Larson <brad@pensando.io> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, andy.shevchenko@gmail.com, arnd@arndb.de, brad@pensando.io, blarson@amd.com, brendan.higgins@linux.dev, briannorris@chromium.org, brijeshkumar.singh@amd.com, catalin.marinas@arm.com, davidgow@google.com, gsomlo@gmail.com, gerg@linux-m68k.org, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, lee.jones@linaro.org, broonie@kernel.org, yamada.masahiro@socionext.com, p.zabel@pengutronix.de, piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, will@kernel.org, devicetree@vger.kernel.org Subject: [PATCH v9 11/15] spi: dw: Add support for AMD Pensando Elba SoC Date: Wed, 18 Jan 2023 19:39:14 -0800 [thread overview] Message-ID: <20230119033918.44117-12-blarson@amd.com> (raw) In-Reply-To: <20230119033918.44117-1-blarson@amd.com> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller with device specific chip-select control. The Elba SoC provides four chip-selects where the native DW IP supports two chip-selects. The Elba DW_SPI instance has two native CS signals that are always overridden. Signed-off-by: Brad Larson <blarson@amd.com> --- Changes since v6: - Add use of macros GENMASK() and BIT() - Change ELBA_SPICS_SHIFT() to ELBA_SPICS_OFFSET() --- drivers/spi/spi-dw-mmio.c | 78 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 26c40ea6dd12..9b6f876227e8 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -53,6 +53,24 @@ struct dw_spi_mscc { void __iomem *spi_mst; /* Not sparx5 */ }; +struct dw_spi_elba { + struct regmap *syscon; +}; + +/* + * Elba SoC does not use ssi, pin override is used for cs 0,1 and + * gpios for cs 2,3 as defined in the device tree. + * + * cs: | 1 0 + * bit: |---3-------2-------1-------0 + * | cs1 cs1_ovr cs0 cs0_ovr + */ +#define ELBA_SPICS_REG 0x2468 +#define ELBA_SPICS_OFFSET(cs) ((cs) << 1) +#define ELBA_SPICS_MASK(cs) (GENMASK(1, 0) << ELBA_SPICS_OFFSET(cs)) +#define ELBA_SPICS_SET(cs, val) \ + ((((val) << 1) | BIT(0)) << ELBA_SPICS_OFFSET(cs)) + /* * The Designware SPI controller (referred to as master in the documentation) * automatically deasserts chip select when the tx fifo is empty. The chip @@ -237,6 +255,65 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, return 0; } +static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int cs, int enable) +{ + regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs), + ELBA_SPICS_SET(cs, enable)); + +} + +static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable) +{ + struct dw_spi *dws = spi_master_get_devdata(spi->master); + struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); + struct dw_spi_elba *dwselba = dwsmmio->priv; + u8 cs; + + cs = spi->chip_select; + if (cs < 2) + dw_spi_elba_override_cs(dwselba, spi->chip_select, enable); + + /* + * The DW SPI controller needs a native CS bit selected to start + * the serial engine. + */ + spi->chip_select = 0; + dw_spi_set_cs(spi, enable); + spi->chip_select = cs; +} + +static int dw_spi_elba_init(struct platform_device *pdev, + struct dw_spi_mmio *dwsmmio) +{ + const char *syscon_name = "amd,pensando-elba-syscon"; + struct device_node *np = pdev->dev.of_node; + struct dw_spi_elba *dwselba; + struct device_node *node; + struct regmap *regmap; + + node = of_parse_phandle(np, syscon_name, 0); + if (!node) { + dev_err(&pdev->dev, "failed to find %s\n", syscon_name); + return -ENODEV; + } + + regmap = syscon_node_to_regmap(node); + if (IS_ERR(regmap)) { + dev_err(&pdev->dev, "syscon regmap lookup failed\n"); + return PTR_ERR(regmap); + } + + dwselba = devm_kzalloc(&pdev->dev, sizeof(*dwselba), GFP_KERNEL); + if (!dwselba) + return -ENOMEM; + + dwselba->syscon = regmap; + dwsmmio->priv = dwselba; + dwsmmio->dws.set_cs = dw_spi_elba_set_cs; + + return 0; +} + static int dw_spi_mmio_probe(struct platform_device *pdev) { int (*init_func)(struct platform_device *pdev, @@ -352,6 +429,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = { { .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init}, { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init}, { .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init}, + { .compatible = "amd,pensando-elba-spi", .data = dw_spi_elba_init}, { /* end of table */} }; MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match); -- 2.17.1
next prev parent reply other threads:[~2023-01-19 3:44 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-19 3:39 [PATCH v9 00/15] Support AMD Pensando Elba SoC Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 01/15] dt-bindings: arm: add AMD Pensando boards Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 03/15] dt-bindings: spi: cdns: Add compatible for " Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 04/15] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller bindings Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 05/15] dt-bindings: mfd: syscon: Add amd,pensando-elba-syscon compatible Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 06/15] dt-bindings: mfd: amd,pensando-elbasr: Add AMD Pensando System Resource chip Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 07/15] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 08/15] arm64: Add config for AMD Pensando SoC platforms Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 09/15] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 10/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` Brad Larson [this message] 2023-01-19 3:39 ` [PATCH v9 11/15] spi: dw: Add support " Brad Larson 2023-01-19 3:39 ` [PATCH v9 12/15] mmc: sdhci-cadence: Enable device specific override of writel() Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 13/15] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 14/15] mmc: sdhci-cadence: Support mmc hardware reset Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 8:57 ` Arnd Bergmann 2023-01-19 8:57 ` Arnd Bergmann 2023-02-07 1:51 ` Brad Larson 2023-02-07 1:51 ` Brad Larson 2023-01-19 3:39 ` [PATCH v9 15/15] spi: pensando-sr: Add AMD Pensando SoC System Resource Brad Larson 2023-01-19 3:39 ` Brad Larson 2023-01-19 9:22 ` Arnd Bergmann 2023-01-19 9:22 ` Arnd Bergmann 2023-01-19 3:51 [PATCH v9 00/15] Support AMD Pensando Elba SoC Brad Larson 2023-01-19 3:51 ` [PATCH v9 11/15] spi: dw: Add support for " Brad Larson 2023-01-19 3:51 ` Brad Larson 2023-01-19 9:58 ` Andy Shevchenko 2023-01-19 9:58 ` Andy Shevchenko 2023-01-24 2:59 ` Brad Larson 2023-01-24 2:59 ` Brad Larson
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