From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 11/16] drm/display/dp: Fix the DP DSC Receiver cap size Date: Fri, 20 Jan 2023 10:08:39 +0530 [thread overview] Message-ID: <20230120043844.3761895-12-ankit.k.nautiyal@intel.com> (raw) In-Reply-To: <20230120043844.3761895-1-ankit.k.nautiyal@intel.com> DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh. Fix the DSC RECEIVER CAP SIZE accordingly. Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT") Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: <stable@vger.kernel.org> # v5.0+ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- include/drm/display/drm_dp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 632376c291db..bdc05593f462 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -1532,7 +1532,7 @@ enum drm_dp_phy { #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf -#define DP_DSC_RECEIVER_CAP_SIZE 0xf +#define DP_DSC_RECEIVER_CAP_SIZE 0x10 /* DSC Capabilities 0x60 through 0x6F */ #define EDP_PSR_RECEIVER_CAP_SIZE 2 #define EDP_DISPLAY_CTL_CAP_SIZE 3 #define DP_LTTPR_COMMON_CAP_SIZE 8 -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: manasi.d.navare@intel.com, vandita.kulkarni@intel.com, anusha.srivatsa@intel.com, swati2.sharma@intel.com, stanislav.lisovskiy@intel.com Subject: [PATCH 11/16] drm/display/dp: Fix the DP DSC Receiver cap size Date: Fri, 20 Jan 2023 10:08:39 +0530 [thread overview] Message-ID: <20230120043844.3761895-12-ankit.k.nautiyal@intel.com> (raw) In-Reply-To: <20230120043844.3761895-1-ankit.k.nautiyal@intel.com> DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh. Fix the DSC RECEIVER CAP SIZE accordingly. Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT") Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: <stable@vger.kernel.org> # v5.0+ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- include/drm/display/drm_dp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 632376c291db..bdc05593f462 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -1532,7 +1532,7 @@ enum drm_dp_phy { #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf -#define DP_DSC_RECEIVER_CAP_SIZE 0xf +#define DP_DSC_RECEIVER_CAP_SIZE 0x10 /* DSC Capabilities 0x60 through 0x6F */ #define EDP_PSR_RECEIVER_CAP_SIZE 2 #define EDP_DISPLAY_CTL_CAP_SIZE 3 #define DP_LTTPR_COMMON_CAP_SIZE 8 -- 2.25.1
next prev parent reply other threads:[~2023-01-20 4:42 UTC|newest] Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-20 4:38 [PATCH 00/16] Add DSC fractional bpp support Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 01/16] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 02/16] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-24 16:23 ` Jani Nikula 2023-01-24 16:23 ` [Intel-gfx] " Jani Nikula 2023-01-25 5:02 ` Nautiyal, Ankit K 2023-01-25 5:02 ` [Intel-gfx] " Nautiyal, Ankit K 2023-01-20 4:38 ` [PATCH 03/16] drm/i915/dp: Do not check for min " Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 04/16] drm/i915/dp: Check if dsc forced bpc is in allowed limits Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 05/16] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 06/16] drm/i915/dp: Rename helpers to get DSC max pipe_bpp/output_bpp Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 07/16] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 08/16] drm/i915/display: Store compressed bpp in U6.4 format Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 09/16] drm/i915/display: Consider fractional vdsc bpp while computing m_n values Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 10/16] drm/i915/audio : Consider fractional vdsc bpp while computing tu_data Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` Ankit Nautiyal [this message] 2023-01-20 4:38 ` [PATCH 11/16] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] [PATCH 12/16] drm/display/dp: Add helper function to get DSC bpp prescision Ankit Nautiyal 2023-01-20 4:38 ` Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] [PATCH 13/16] drm/i915/dsc/mtl: Add support for fractional bpp Ankit Nautiyal 2023-01-20 4:38 ` Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 14/16] drm/i915/dp: Iterate over output bpp with fractional step size Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 15/16] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:38 ` [PATCH 16/16] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs Ankit Nautiyal 2023-01-20 4:38 ` [Intel-gfx] " Ankit Nautiyal 2023-01-20 4:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DSC fractional bpp support (rev3) Patchwork 2023-01-20 5:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2023-01-20 23:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230120043844.3761895-12-ankit.k.nautiyal@intel.com \ --to=ankit.k.nautiyal@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.