From: bchihi@baylibre.com To: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, khilman@baylibre.com, james.lo@mediatek.com, rex-bc.chen@mediatek.com Subject: [PATCH v11 2/6] dt-bindings/thermal/mediatek: Add LVTS thermal controllers dt-binding definition Date: Tue, 24 Jan 2023 14:17:13 +0100 [thread overview] Message-ID: <20230124131717.128660-3-bchihi@baylibre.com> (raw) In-Reply-To: <20230124131717.128660-1-bchihi@baylibre.com> From: Balsam CHIHI <bchihi@baylibre.com> Add LVTS thermal controllers dt-binding definition for mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> --- .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ 2 files changed, 126 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml new file mode 100644 index 000000000000..12bfbdd8ff89 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) + +maintainers: + - Balsam CHIHI <bchihi@baylibre.com> + +description: | + LVTS is a thermal management architecture composed of three subsystems, + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), + a Converter - Low Voltage Thermal Sensor converter (LVTS), and + a Digital controller (LVTS_CTRL). + +properties: + compatible: + enum: + - mediatek,mt8195-lvts-ap + - mediatek,mt8195-lvts-mcu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + description: LVTS reset for clearing temporary data on AP/MCU. + + nvmem-cells: + minItems: 1 + items: + - description: Calibration eFuse data 1 for LVTS + - description: Calibration eFuse data 2 for LVTS + + nvmem-cell-names: + minItems: 1 + items: + - const: lvts-calib-data-1 + - const: lvts-calib-data-2 + + "#thermal-sensor-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - nvmem-cells + - nvmem-cell-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/reset/mt8195-resets.h> + #include <dt-bindings/thermal/mediatek-lvts.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + lvts_mcu: thermal-sensor@11278000 { + compatible = "mediatek,mt8195-lvts-mcu"; + reg = <0 0x11278000 0 0x1000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal_zones: thermal-zones { + cpu0-thermal { + polling-delay = <1000>; + polling-delay-passive = <250>; + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; + + trips { + cpu0_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_crit: trip-crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h new file mode 100644 index 000000000000..428a95c18509 --- /dev/null +++ b/include/dt-bindings/thermal/mediatek-lvts.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Balsam CHIHI <bchihi@baylibre.com> + */ + +#ifndef __MEDIATEK_LVTS_DT_H +#define __MEDIATEK_LVTS_DT_H + +#define MT8195_MCU_BIG_CPU0 0 +#define MT8195_MCU_BIG_CPU1 1 +#define MT8195_MCU_BIG_CPU2 2 +#define MT8195_MCU_BIG_CPU3 3 +#define MT8195_MCU_LITTLE_CPU0 4 +#define MT8195_MCU_LITTLE_CPU1 5 +#define MT8195_MCU_LITTLE_CPU2 6 +#define MT8195_MCU_LITTLE_CPU3 7 + +#endif /* __MEDIATEK_LVTS_DT_H */ -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: bchihi@baylibre.com To: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, khilman@baylibre.com, james.lo@mediatek.com, rex-bc.chen@mediatek.com Subject: [PATCH v11 2/6] dt-bindings/thermal/mediatek: Add LVTS thermal controllers dt-binding definition Date: Tue, 24 Jan 2023 14:17:13 +0100 [thread overview] Message-ID: <20230124131717.128660-3-bchihi@baylibre.com> (raw) In-Reply-To: <20230124131717.128660-1-bchihi@baylibre.com> From: Balsam CHIHI <bchihi@baylibre.com> Add LVTS thermal controllers dt-binding definition for mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> --- .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ 2 files changed, 126 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml new file mode 100644 index 000000000000..12bfbdd8ff89 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) + +maintainers: + - Balsam CHIHI <bchihi@baylibre.com> + +description: | + LVTS is a thermal management architecture composed of three subsystems, + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), + a Converter - Low Voltage Thermal Sensor converter (LVTS), and + a Digital controller (LVTS_CTRL). + +properties: + compatible: + enum: + - mediatek,mt8195-lvts-ap + - mediatek,mt8195-lvts-mcu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + description: LVTS reset for clearing temporary data on AP/MCU. + + nvmem-cells: + minItems: 1 + items: + - description: Calibration eFuse data 1 for LVTS + - description: Calibration eFuse data 2 for LVTS + + nvmem-cell-names: + minItems: 1 + items: + - const: lvts-calib-data-1 + - const: lvts-calib-data-2 + + "#thermal-sensor-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - nvmem-cells + - nvmem-cell-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/reset/mt8195-resets.h> + #include <dt-bindings/thermal/mediatek-lvts.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + lvts_mcu: thermal-sensor@11278000 { + compatible = "mediatek,mt8195-lvts-mcu"; + reg = <0 0x11278000 0 0x1000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal_zones: thermal-zones { + cpu0-thermal { + polling-delay = <1000>; + polling-delay-passive = <250>; + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; + + trips { + cpu0_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_crit: trip-crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h new file mode 100644 index 000000000000..428a95c18509 --- /dev/null +++ b/include/dt-bindings/thermal/mediatek-lvts.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Balsam CHIHI <bchihi@baylibre.com> + */ + +#ifndef __MEDIATEK_LVTS_DT_H +#define __MEDIATEK_LVTS_DT_H + +#define MT8195_MCU_BIG_CPU0 0 +#define MT8195_MCU_BIG_CPU1 1 +#define MT8195_MCU_BIG_CPU2 2 +#define MT8195_MCU_BIG_CPU3 3 +#define MT8195_MCU_LITTLE_CPU0 4 +#define MT8195_MCU_LITTLE_CPU1 5 +#define MT8195_MCU_LITTLE_CPU2 6 +#define MT8195_MCU_LITTLE_CPU3 7 + +#endif /* __MEDIATEK_LVTS_DT_H */ -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-24 13:17 UTC|newest] Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-24 13:17 [PATCH v11 0/6] Add LVTS thermal architecture bchihi 2023-01-24 13:17 ` bchihi 2023-01-24 13:17 ` [PATCH v11 1/6] thermal/drivers/mediatek: Relocate driver to mediatek folder bchihi 2023-01-24 13:17 ` bchihi 2023-01-24 15:37 ` AngeloGioacchino Del Regno 2023-01-24 15:37 ` AngeloGioacchino Del Regno 2023-01-25 15:02 ` Balsam CHIHI 2023-01-25 15:02 ` Balsam CHIHI 2023-01-24 13:17 ` bchihi [this message] 2023-01-24 13:17 ` [PATCH v11 2/6] dt-bindings/thermal/mediatek: Add LVTS thermal controllers dt-binding definition bchihi 2023-01-25 11:14 ` Daniel Lezcano 2023-01-25 11:14 ` Daniel Lezcano 2023-01-25 20:35 ` Rob Herring 2023-01-25 20:35 ` Rob Herring 2023-01-25 21:13 ` Daniel Lezcano 2023-01-25 21:13 ` Daniel Lezcano 2023-01-25 20:34 ` Rob Herring 2023-01-25 20:34 ` Rob Herring 2023-01-26 10:33 ` Balsam CHIHI 2023-01-26 10:33 ` Balsam CHIHI 2023-01-26 16:10 ` [PATCH v12 2/6] dt-bindings: thermal: mediatek: " bchihi 2023-01-26 16:10 ` bchihi 2023-01-27 22:10 ` Daniel Lezcano 2023-01-27 22:10 ` Daniel Lezcano 2023-01-28 10:50 ` Krzysztof Kozlowski 2023-01-28 10:50 ` Krzysztof Kozlowski 2023-01-30 10:49 ` Balsam CHIHI 2023-01-30 10:49 ` Balsam CHIHI 2023-01-28 10:48 ` Krzysztof Kozlowski 2023-01-28 10:48 ` Krzysztof Kozlowski 2023-01-30 10:40 ` Balsam CHIHI 2023-01-30 10:40 ` Balsam CHIHI 2023-01-30 11:18 ` Matthias Brugger 2023-01-30 11:18 ` Matthias Brugger 2023-01-30 12:19 ` Balsam CHIHI 2023-01-30 12:19 ` Balsam CHIHI 2023-01-30 16:07 ` Matthias Brugger 2023-01-30 16:07 ` Matthias Brugger 2023-01-31 16:53 ` Krzysztof Kozlowski 2023-01-31 16:53 ` Krzysztof Kozlowski 2023-01-31 17:01 ` Daniel Lezcano 2023-01-31 17:01 ` Daniel Lezcano 2023-01-31 14:04 ` [PATCH v3] dt-bindings: thermal: mediatek: Add LVTS thermal controllers bchihi 2023-01-31 14:04 ` bchihi 2023-02-01 7:46 ` Krzysztof Kozlowski 2023-02-01 7:46 ` Krzysztof Kozlowski 2023-02-01 13:34 ` Balsam CHIHI 2023-02-01 13:34 ` Balsam CHIHI 2023-02-01 13:37 ` Krzysztof Kozlowski 2023-02-01 13:37 ` Krzysztof Kozlowski 2023-02-01 13:56 ` Balsam CHIHI 2023-02-01 13:56 ` Balsam CHIHI 2023-03-07 13:42 ` [PATCH] thermal/drivers/mediatek/lvts_thermal: fix memcpy's number of bytes in lvts_calibration_init() bchihi 2023-03-07 13:42 ` bchihi 2023-03-08 9:10 ` AngeloGioacchino Del Regno 2023-03-08 9:10 ` AngeloGioacchino Del Regno 2023-03-09 12:37 ` Dan Carpenter 2023-03-09 12:37 ` Dan Carpenter 2023-01-24 13:17 ` [PATCH v11 3/6] arm64/dts/mt8195: Add efuse node to mt8195 bchihi 2023-01-24 13:17 ` bchihi 2023-01-25 14:25 ` Matthias Brugger 2023-01-25 14:25 ` Matthias Brugger 2023-01-25 15:04 ` Balsam CHIHI 2023-01-25 15:04 ` Balsam CHIHI 2023-01-24 13:17 ` [PATCH v11 4/6] thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver bchihi 2023-01-24 13:17 ` bchihi 2023-01-24 15:31 ` AngeloGioacchino Del Regno 2023-01-24 15:31 ` AngeloGioacchino Del Regno 2023-01-25 15:06 ` Balsam CHIHI 2023-01-25 15:06 ` Balsam CHIHI 2023-01-31 15:38 ` [PATCH v12] thermal: drivers: mediatek: " bchihi 2023-01-31 15:38 ` bchihi 2023-02-01 3:09 ` kernel test robot 2023-02-01 3:09 ` kernel test robot 2023-02-01 7:47 ` Krzysztof Kozlowski 2023-02-01 7:47 ` Krzysztof Kozlowski 2023-02-01 15:14 ` Balsam CHIHI 2023-02-01 15:14 ` Balsam CHIHI 2023-02-01 7:55 ` Krzysztof Kozlowski 2023-02-01 7:55 ` Krzysztof Kozlowski 2023-02-01 16:46 ` Balsam CHIHI 2023-02-01 16:46 ` Balsam CHIHI 2023-02-01 16:59 ` Matthias Brugger 2023-02-01 16:59 ` Matthias Brugger 2023-02-03 10:35 ` Balsam CHIHI 2023-02-03 10:35 ` Balsam CHIHI 2023-02-01 17:12 ` Krzysztof Kozlowski 2023-02-01 17:12 ` Krzysztof Kozlowski 2023-02-03 11:06 ` Balsam CHIHI 2023-02-03 11:06 ` Balsam CHIHI 2023-02-06 14:07 ` Daniel Lezcano 2023-02-06 14:07 ` Daniel Lezcano 2023-02-06 14:30 ` Krzysztof Kozlowski 2023-02-06 14:30 ` Krzysztof Kozlowski 2023-02-06 14:38 ` Daniel Lezcano 2023-02-06 14:38 ` Daniel Lezcano 2023-02-06 14:32 ` Balsam CHIHI 2023-02-06 14:32 ` Balsam CHIHI 2023-01-24 13:17 ` [PATCH v11 5/6] arm64/dts/mt8195: Add thermal zones and thermal nodes bchihi 2023-01-24 13:17 ` bchihi 2023-01-24 15:36 ` AngeloGioacchino Del Regno 2023-01-24 15:36 ` AngeloGioacchino Del Regno 2023-01-25 15:10 ` Balsam CHIHI 2023-01-25 15:10 ` Balsam CHIHI 2023-01-25 19:09 ` Matthias Brugger 2023-01-25 19:09 ` Matthias Brugger 2023-01-26 9:43 ` Balsam CHIHI 2023-01-26 9:43 ` Balsam CHIHI 2023-01-31 15:37 ` [PATCH v12] arm64: dts: mediatek: mt8195: " bchihi 2023-01-31 15:37 ` bchihi 2023-01-24 13:17 ` [PATCH v11 6/6] arm64/dts/mt8195: Add temperature mitigation threshold bchihi 2023-01-24 13:17 ` bchihi 2023-01-24 15:36 ` AngeloGioacchino Del Regno 2023-01-24 15:36 ` AngeloGioacchino Del Regno
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